1. Intel® MAX® 10 User Flash Memory Overview 2. Intel® MAX® 10 UFM Architecture and Features 3. Intel® MAX® 10 UFM Design Considerations 4. Intel® MAX® 10 UFM Implementation Guides 5. On-Chip Flash Intel® FPGA IP Core References 6. Intel® MAX® 10 User Flash Memory User Guide Archive 7. Document Revision History for the Intel® MAX® 10 User Flash Memory User Guide
4.2.7. UFM Burst Read Operation
The burst read operation is a streaming 32-bit read operation.
The burst read operation offers the following modes:
- Data incrementing burst read—allows a maximum of 128 burst counts.
- Data wrapping burst read—has fixed burst counts of 2 (10M04/08) and 4 (10M16/25/40/50)
To perform a UFM burst read operation, follow these steps:
- Assert the read signal and send the legal burst count and legal data addresses to the data interface.
- The flash IP core asserts the waitrequest signal when it is busy.
- The flash IP core then asserts the readdatavalid signal and sends the data through the readdata bus.
Note: For data wrapping burst read operation, if the address reaches the end of the flash, it wraps back to the beginning of the flash and continues reading.
- The flash IP core sets the busy field in the status register to 2'b11 or busy_read when the read operation is in progress.
- If the operation goes well, the flash IP core sets the read successful field in the status register to 1'b1 or read successful. It sets the read successful field in the status register to 1'b0 (failed) and changes empty flash to 1 if you try to read from an illegal address or protected sector.
UFM Data Incrementing Burst Read
UFM Data Wrapping Burst Read
Did you find the information on this page useful?