184.108.40.206. Specify Instance-Specific Constraints in Assignment Editor 220.127.116.11. Specifying Multi-Dimensional Bus Constraints 18.104.22.168. Specify I/O Constraints in Pin Planner 22.214.171.124. Plan Interface Constraints in Interface Planner and Tile Interface Planner 126.96.36.199. Adjust Constraints with the Chip Planner 188.8.131.52. Constraining Designs with the Design Partition Planner
184.108.40.206. Report Pins
Generate reports about I/O pins in the design. Right-click any cell type to place, unplace, or report connectivity or location information.
|Report All Placed Pins||Generates the Placed Pins report. This report lists the name, parent, type, and location of all placed pins in the interface plan.|
|Report All Unplaced Pins||Generates the Unplaced Pins report. This report lists the name, parent, type, and the number of potential placements for all unplaced pins in the interface plan.|
Figure 17. Placed Pins Report
Figure 18. Unplaced Pins Report
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