P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683059
Date 2/01/2023
Public
Document Table of Contents

3.2.2.5.22. VirtIO PCI Configuration Access Data Register (Address: 0x03B)

The PCI configuration data register indicates the data for BAR access.

Table 40.  VirtIO PCI Configuration Access Data Register
Bit Location Description Access Type Default Value
31:0 PCI Configuration Data RWS Undetermined (*)
Note: (*) Software needs to write the correct value to this register.

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