P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683059
Date 2/01/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.2.2. Enabling the P-Tile Debug Toolkit

To enable the P-Tile Debug Toolkit in your design, enable the option Enable P-Tile Debug Toolkit in the Top-Level Settings tab of the Intel FPGA P-Tile Avalon® -ST IP for PCI Express.

When the Debug Toolkit is enabled via the Enable P-Tile Debug Toolkit parameter, the PHY reconfiguration interface is automatically enabled.