F-Tile Ethernet Intel® FPGA Hard IP User Guide

ID 683023
Date 4/03/2023
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7.5. RX MAC Segmented Client Interface

The F-Tile Ethernet Intel® FPGA Hard IP RX client interface allows the application to read frame data from the RX MAC segmented when it is received. Packets may start on any 8-byte segment.

Table 45.  Signals of the Avalon® Streaming RX Client InterfaceAll interface signals are clocked by the RX clock.

Name

Width

Description

o_rx_mac_data[1023:0]

o_rx_mac_data[511:0]

o_rx_mac_data[255:0]

o_rx_mac_data[127:0]

o_rx_mac_data[63:0]

1024 bits (400GE)

512 bits (200GE)

256 bits (100GE)

128 bits (50GE/40GE)

64 bits (25GE/10GE)

Output data to the MAC when the rate is 10GE/25/40GE/50GE/100GE/200GE/400GE. Bit 0 is the LSB.

o_rx_mac_valid

1 bit

When asserted, indicates that RX data is valid on this cycle

When deasserted, ignore the signals value.

i_rx_mac_inframe[15:0]

i_rx_mac_inframe[7:0]

i_rx_mac_inframe[3:0]

i_rx_mac_inframe[1:0]

i_rx_mac_inframe[0]

16 bits (400GE)

8 bits (200GE)

4 bits (100GE)

2 bits (50GE/40GE)

1 bit (25GE/10GE)

Indicates the valid data in each EMIB. With the previous segment's inframe signal, indicates the SOP and EOP location.

Each segment is 64 bits.

o_rx_mac_eop_empty[47:0]

o_rx_mac_eop_empty[23:0]

o_rx_mac_eop_empty[11:0]

o_rx_mac_eop_empty[5:0]

o_rx_mac_eop_empty[2:0]

48 bits (400GE)

24 bits (200GE)

12 bits (100GE)

6 bits (50GE/40GE)

3 bits (25GE/10GE)

Indicates the number of empty bytes on the RX data signal where EOC occurs, starting from the most significant byte (MSB).

o_rx_mac_fcs_error[15:0]

o_rx_mac_fcs_error[7:0]

o_rx_mac_fcs_error[3:0]

o_rx_mac_fcs_error[1:0]

o_rx_mac_fcs_error[0]

16 bits (400GE)

8 bits (200GE)

4 bits (100GE)

2 bits (50GE/40GE)

1 bit (25GE/10GE)

Indicates that the currently ending frame has an error.

Valid only on EOP segments. A valid high on this signal indicates that the frame that is ending either had an FCS error, was malformed, was undersized, or was oversized and truncated because the MTU enforcement feature of the RX MAC was enabled.

o_rx_mac_error[31:0]

o_rx_mac_error[15:0]

o_rx_mac_error[7:0]

o_rx_mac_error[3:0]

o_rx_mac_error[1:0]

32 bits (400GE)

16 bits (200GE)

8 bits (100GE)

4 bits (50GE/40GE)

1 bit (25GE/10GE)

Indicates that the currently ending frame has a decoding error.

The [1:0] bits for each segment accept values 0, 1, 2, and 3, and report different types of errors:

  • 2'd0: If FCS error is deasserted, the packet contains no error.
  • 2'd1: Malformed packet error. The IP core identifies a malformed packet when it receives a control character that is not a terminate character.
  • 2'd2: Undersized (frame shorter than 64b) or oversized (frame larger than the programmed maximum frame rate) frame.
  • 2'd3: Payload length error. The payload received in the frame is shorter than the length field value, and the value in the length field is less than or equal 1500 bytes. If the frame is oversized or undersized, the case is not reported here. If the frame is malformed, the case is not reported here.

o_rx_mac_status_data[47:0]

o_rx_mac_status_data[23:0]

o_rx_mac_status_data[11:0]

o_rx_mac_status_data[5:0]

o_rx_mac_status_data[2:0]

48 bits (400GE)

24 bits (200GE)

12 bits (100GE)

6 bits (50GE/40GE)

3 bits (25GE/10GE)

Specifies information about the received frame. If multiple status occur, the status is reported in 5, 4, 7, 6, 1, 2, 3, 0 priority order.

The individual bits report different information:

  • 3'd7: When asserted, indicates a FC (Length/Type is 0x8808) frame
  • 3'd6: When asserted, indicates illegal length frame
  • 3'd5: When asserted, indicates a SVLAN frame and a stacked VLAN frame
  • 3'd4: When asserted, indicates a SFC frame or PFC frame
  • 3'd3: Reserved
  • 3'd2: When asserted, indicates a BCAST frame and a MCAST frame
  • 3'd1: When asserted, indicates an Ethernet type frame that is not FC frame
  • 3'd0: When asserted, indicates a valid length frame
Figure 42. Receiving Data Using the RX MAC Client Interface

The figure above shows how to receive data using the RX MAC segmented client interface.

  • Packets may start on any 8-byte segment of i_tx_mac_data (Segmented). The i_tx_mac_inframe transition from 0 to 1 (between two consecutive segments) indicates a start of packet (SOP). The SOP begins at a segment where o_rx_mac_frame is set to 1.
  • For multisegmented interfaces, a new packet may start and the previous packet end are within the same cycle.
  • When the packet ends, o_rx_mac_eop_empty is set to the number of unused bytes in o_rx_mac_data.
    • The o_rx_mac_eop_empty transition from 1 to 0 (between two consecutive segments) indicates the end of packet (EOP). The EOP ends in the segment where o_rx_mac_inframe is set to 0.
    • The minimum number of bytes on the last cycle is 1.
Note: The interface does not take direct backpressure.