F-Tile Ethernet Intel® FPGA Hard IP User Guide

ID 683023
Date 4/03/2023

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Document Table of Contents

4.3.2. OTN Mode

The F-Tile Ethernet Intel® FPGA Hard IP supports OTN mode in all Ethernet modes with optional RS-FEC feature.

The TX OTN datapath consists of:
  • Alignment insertion—the TX PCS interface inserts alignment markers.
  • Striper—enables logically sequential data to be segmented to increase data throughput.
Note: In OTN mode in 10GE/20GE/40GE/50GE/100GE Ethernet modes, scrambler is bypassed because the input data is expected to be scrambled. In 200GE/400GE Ethernet modes, RS-FEC block descrambles the data.

The RX OTN datapath consists of an aligner block that enables the alignment of the incoming data.