Developer Guide

FPGA Optimization Guide for Intel® oneAPI Toolkits

ID 767853
Date 3/31/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

Instrument the Kernel Pipeline with Performance Counters (-Xsprofile)

Enable profiling during design compilation to add profiling counters to the SYCL kernel pipeline. To instrument the SYCL code with performance counters, add the -Xsprofile flag to your compiler command.

NOTE:
  • Instrumenting the design with performance counters increases hardware resource utilization (that is, increases FPGA area use) and typically decreases performance.
  • Ensure that all kernel names are unique so that the dynamic profiler interprets the results correctly.
CAUTION:

In large designs, the overhead from profiling can cause fMAX degradation. It may also prevent the design from fitting on the chip due to the area overhead of the profiling counters.