SMMU_secure_registers Summary

Base Address: 0xFA000000

Register Address Offset	Bit Fields
`i_aps_smmu_secure_registers`
`SMMU_SCR0` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`SMCFCFG` `RO 0x1`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`BSU` `RW 0x0`		`FB` `RW 0x0`	`PTM` `RW 0x0`	`Reserved`	`USFCFG` `RW 0x0`	`GSE` `RO 0x0`	`STALLD` `RO 0x0`	`TRANSIENTCFG` `RW 0x0`		`GCFGFIE` `RO 0x0`	`GCFGFRE` `RO 0x0`	`Reserved`	`GFIE` `RW 0x0`	`GFRE` `RW 0x0`	`CLIENTPD` `RW 0x1`
`SMMU_NSCR0` `0x400` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`SMCFCFG` `RO 0x1`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`BSU` `RW 0x0`		`FB` `RW 0x0`	`PTM` `RW 0x0`	`VMIDPNE` `RW 0x0`	`USFCFG` `RW 0x0`	`GSE` `RO 0x0`	`STALLD` `RO 0x0`	`TRANSIENTCFG` `RW 0x0`		`GCFGFIE` `RO 0x0`	`GCFGFRE` `RO 0x0`	`Reserved`	`GFIE` `RW 0x0`	`GFRE` `RW 0x0`	`CLIENTPD` `RW 0x1`
`SMMU_SCR1` `0x4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`			`NSCAFRO` `RO 0x0`	`SPMEN` `RW 0x0`	`SIF` `RW 0x0`	`GEFRO` `RW 0x1`	`GASRAE` `RW 0x0`	`NSNUMIRPTO` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSNUMSMRGO` `RW 0x40`							`Reserved`		`NSNUMCBO` `RW 0x20`
`SMMU_SACR` `0x10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`NORMALIZE` `RW 0x0`	`CACHE_LOCK` `RW 0x1`	`Reserved`									`PAGESIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`S2CRB_TLBEN` `RW 0x0`	`MMUDISB_TLBEN` `RW 0x0`	`SMTNMB_TLBEN` `RW 0x0`	`Reserved`					`S1WC2EN` `RW 0x1`	`Reserved`
`SMMU_NSACR` `0x410` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`					`CACHE_LOCK` `RW 0x1`	`DP4K_TBUDISB` `RW 0x0`	`DP4K_TCUDISB` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`S2CRB_TLBEN` `RW 0x0`	`MMUDISB_TLBEN` `RW 0x0`	`SMTNMB_TLBEN` `RW 0x0`	`Reserved`			`IPA2PA_CEN` `RW 0x1`	`S2WC2EN` `RW 0x1`	`S1WC2EN` `RW 0x1`	`Reserved`
`SMMU_SIDR0` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SES` `RO 0x1`	`S1TS` `RO 0x1`	`S2TS` `RO 0x1`	`NTS` `RO 0x1`	`SMS` `RO 0x1`	`ATOSNS` `RO 0x1`	`PTFS` `RO 0x0`		`NUMIRPT` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`CTTW` `RO 0x0`	`BTM` `RO 0x1`	`NUMSIDB` `RO 0xF`				`Reserved`	`NUMSMRG` `RO 0x40`
`SMMU_SIDR1` `0x24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PAGESIZE` `RO 0x0`	`NUMPAGENDXB` `RO 0x4`			`Reserved`				`NUMS2CB` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SMCD` `RO 0x0`	`Reserved`		`SSDTP` `RO 0x1`	`NUMSSDNDXB` `RO 0xF`				`NUMCB` `RO 0x20`
`SMMU_SIDR2` `0x28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`PTFSV8_64Kb` `RO 0x1`	`PTFSV8_16Kb` `RO 0x0`	`TFSV8_4Kb` `RO 0x1`	`UBS` `RO 0x5`				`OAS` `RO 0x5`				`IAS` `RO 0x5`
`SMMU_SIDR7` `0x3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`MAJOR` `RO 0x2`				`MINOR` `RO 0x1`
`SMMU_SGFAR_low` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`FADDR` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FADDR` `RW 0x0`
`SMMU_SGFAR_high` `0x44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`FADDR` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FADDR` `RW 0x0`
`SMMU_NSGFAR_low` `0x440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`FADDR` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FADDR` `RW 0x0`
`SMMU_NSGFAR_high` `0x444` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`FADDR` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FADDR` `RW 0x0`
`SMMU_SGFSR` `0x48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`UUT` `WO 0x0`	`PF` `WO 0x0`	`EF` `WO 0x0`	`CAF` `WO 0x0`	`UCIF` `WO 0x0`	`UCBF` `WO 0x0`	`SMCF` `WO 0x0`	`USF` `WO 0x0`	`ICF` `WO 0x0`
`SMMU_NSGFSR` `0x448` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`UUT` `WO 0x0`	`Reserved`	`EF` `WO 0x0`	`CAF` `WO 0x0`	`UCIF` `WO 0x0`	`UCBF` `WO 0x0`	`SMCF` `WO 0x0`	`USF` `WO 0x0`	`ICF` `WO 0x0`
`SMMU_SGFSRRESTORE` `0x4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`UUT` `WO 0x0`	`PF` `WO 0x0`	`EF` `WO 0x0`	`CAF` `WO 0x0`	`UCIF` `WO 0x0`	`UCBF` `WO 0x0`	`SMCF` `WO 0x0`	`USF` `WO 0x0`	`ICF` `WO 0x0`
`SMMU_NSGFSRRESTORE` `0x44C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`UUT` `WO 0x0`	`Reserved`	`EF` `WO 0x0`	`CAF` `WO 0x0`	`UCIF` `WO 0x0`	`UCBF` `WO 0x0`	`SMCF` `WO 0x0`	`USF` `WO 0x0`	`ICF` `WO 0x0`
`SMMU_SGFSYNR0` `0x50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`ATS` `RO 0x0`	`NSATTR` `RW 0x0`	`NSSTATE` `RW 0x0`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`
`SMMU_NSGFSYNR0` `0x450` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`ATS` `RO 0x0`	`Reserved`		`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Nested` `RW 0x0`
`SMMU_SGFSYNR1` `0x54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_NSGFSYNDR1` `0x454` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_STLBIALL` `0x60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_TLBIVMID` `0x64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`VMID` `WO 0x0`
`SMMU_TLBIALLNSNH` `0x68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_NSTLBGSYNC` `0x470` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_STLBGSYNC` `0x70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_STLBGSTATUS` `0x74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`GSACTIVE` `RO 0x0`
`SMMU_NSTLBGSTATUS` `0x474` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`GSACTIVE` `RO 0x0`
`SMMU_DBGRPTRTBU` `0x80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`					`TBU_ID` `RW 0x0`			`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TLB_Pointer` `RW 0x0`												`TLB_Entry_Pointer` `RW 0x0`
`SMMU_DBGRDATATBU` `0x84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RO 0x0`
`SMMU_DBGRPTRTCU` `0x88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`DATASRC` `RW 0x0`		`WAY_RAM` `RW 0x0`		`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`TLB_Pointer` `RW 0x0`							`TLB_Entry_Pointer` `RW 0x0`
`SMMU_DBGRDATATCU` `0x8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RO 0x0`
`SMMU_STLBIVALM_low` `0xA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_STLBIVALM_high` `0xA4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_STLBIVAM_low` `0xA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_STLBIVAM_high` `0xAC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_STLBIALLM` `0xBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_SMR0` `0x800` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR1` `0x804` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR2` `0x808` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR3` `0x80C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR4` `0x810` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR5` `0x814` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR6` `0x818` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR7` `0x81C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR8` `0x820` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR9` `0x824` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR10` `0x828` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR11` `0x82C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR12` `0x830` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR13` `0x834` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR14` `0x838` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR15` `0x83C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR16` `0x840` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR17` `0x844` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR18` `0x848` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR19` `0x84C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR20` `0x850` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR21` `0x854` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR22` `0x858` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR23` `0x85C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR24` `0x860` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR25` `0x864` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR26` `0x868` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR27` `0x86C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR28` `0x870` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR29` `0x874` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR30` `0x878` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR31` `0x87C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR32` `0x880` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR33` `0x884` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR34` `0x888` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR35` `0x88C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR36` `0x890` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR37` `0x894` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR38` `0x898` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR39` `0x89C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR40` `0x8A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR41` `0x8A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR42` `0x8A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR43` `0x8AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR44` `0x8B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR45` `0x8B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR46` `0x8B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR47` `0x8BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR48` `0x8C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR49` `0x8C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR50` `0x8C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR51` `0x8CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR52` `0x8D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR53` `0x8D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR54` `0x8D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR55` `0x8DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR56` `0x8E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR57` `0x8E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR58` `0x8E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR59` `0x8EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR60` `0x8F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR61` `0x8F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR62` `0x8F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_SMR63` `0x8FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`VALID` `RW 0x0`	`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`ID` `RW 0x0`
`SMMU_S2CR0` `0xC00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR1` `0xC04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR2` `0xC08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR3` `0xC0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR4` `0xC10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR5` `0xC14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR6` `0xC18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR7` `0xC1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR8` `0xC20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR9` `0xC24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR10` `0xC28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR11` `0xC2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR12` `0xC30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR13` `0xC34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR14` `0xC38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR15` `0xC3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR16` `0xC40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR17` `0xC44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR18` `0xC48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR19` `0xC4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR20` `0xC50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR21` `0xC54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR22` `0xC58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR23` `0xC5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR24` `0xC60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR25` `0xC64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR26` `0xC68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR27` `0xC6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR28` `0xC70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR29` `0xC74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR30` `0xC78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR31` `0xC7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR32` `0xC80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR33` `0xC84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR34` `0xC88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR35` `0xC8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR36` `0xC90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR37` `0xC94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR38` `0xC98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR39` `0xC9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR40` `0xCA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR41` `0xCA4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR42` `0xCA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR43` `0xCAC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR44` `0xCB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR45` `0xCB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR46` `0xCB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR47` `0xCBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR48` `0xCC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR49` `0xCC4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR50` `0xCC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR51` `0xCCC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR52` `0xCD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR53` `0xCD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR54` `0xCD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR55` `0xCDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR56` `0xCE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR57` `0xCE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR58` `0xCE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR59` `0xCEC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR60` `0xCF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR61` `0xCF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR62` `0xCF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_S2CR63` `0xCFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`TRANSIENTCFG` `RW 0x0`		`INSTCFG_1` `RW 0x0`	`INSTCFG_0_FB` `RW 0x0`	`PRIVCFG_BSU` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`NSCFG` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEM_ATTR` `RW 0x0`				`MTCFG` `RW 0x0`	`Reserved`	`SHCFG` `RW 0x0`		`CBNDX_VMID` `RW 0x0`
`SMMU_PIDR0` `0xFE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`PartNumber0` `RO 0x81`
`SMMU_PIDR1` `0xFE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`JEP106_identity_code` `RO 0xB`				`PartNumber1` `RO 0x4`
`SMMU_PIDR2` `0xFE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`Architecture_Revision` `RO 0x1`				`JEDEC` `RO 0x1`	`JEP106_identity_code` `RO 0x3`
`SMMU_PIDR3` `0xFEC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`RevAnd` `RO 0x0`				`Customer_modified` `RO 0x0`
`SMMU_PIDR4` `0xFD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`FourKB_Count` `RO 0x0`				`JEP106_Continuation_code` `RO 0x4`
`SMMU_PIDR5` `0xFD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`
`SMMU_PIDR6` `0xFD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`
`SMMU_PIDR7` `0xFDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`
`SMMU_CIDR0` `0xFF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`PREAMBLE` `RO 0xD`
`SMMU_CIDR1` `0xFF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`PREAMBLE` `RO 0xF0`
`SMMU_CIDR2` `0xFF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`PREAMBLE` `RO 0x5`
`SMMU_CIDR3` `0xFFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`PREAMBLE` `RO 0xB1`
`SMMU_CBAR0` `0x1000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA0` `0x1400` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R0` `0x1800` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR1` `0x1004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA1` `0x1404` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R1` `0x1804` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR2` `0x1008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA2` `0x1408` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R2` `0x1808` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR3` `0x100C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA3` `0x140C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R3` `0x180C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR4` `0x1010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA4` `0x1410` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R4` `0x1810` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR5` `0x1014` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA5` `0x1414` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R5` `0x1814` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR6` `0x1018` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA6` `0x1418` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R6` `0x1818` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR7` `0x101C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA7` `0x141C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R7` `0x181C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR8` `0x1020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA8` `0x1420` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R8` `0x1820` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR9` `0x1024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA9` `0x1424` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R9` `0x1824` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR10` `0x1028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA10` `0x1428` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R10` `0x1828` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR11` `0x102C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA11` `0x142C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R11` `0x182C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR12` `0x1030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA12` `0x1430` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R12` `0x1830` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR13` `0x1034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA13` `0x1434` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R13` `0x1834` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR14` `0x1038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA14` `0x1438` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R14` `0x1838` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR15` `0x103C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA15` `0x143C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R15` `0x183C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR16` `0x1040` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA16` `0x1440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R16` `0x1840` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR17` `0x1044` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA17` `0x1444` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R17` `0x1844` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR18` `0x1048` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA18` `0x1448` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R18` `0x1848` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR19` `0x104C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA19` `0x144C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R19` `0x184C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR20` `0x1050` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA20` `0x1450` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R20` `0x1850` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR21` `0x1054` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA21` `0x1454` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R21` `0x1854` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR22` `0x1058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA22` `0x1458` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R22` `0x1858` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR23` `0x105C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA23` `0x145C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R23` `0x185C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR24` `0x1060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA24` `0x1460` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R24` `0x1860` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR25` `0x1064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA25` `0x1464` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R25` `0x1864` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR26` `0x1068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA26` `0x1468` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R26` `0x1868` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR27` `0x106C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA27` `0x146C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R27` `0x186C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR28` `0x1070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA28` `0x1470` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R28` `0x1870` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR29` `0x1074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA29` `0x1474` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R29` `0x1874` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR30` `0x1078` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA30` `0x1478` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R30` `0x1878` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_CBAR31` `0x107C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IRPTNDX` `RO 0x0`								`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`BSU` `RW 0x0`		`TYPE` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MEMATTR_CBNDX_7_4` `RW 0x0`				`FB_CBNDX_3` `RW 0x0`	`HYPC_CBNDX_2` `RW 0x0`	`BPSHCFG_CBNDX_1_0` `RW 0x0`		`VMID` `RW 0x0`
`SMMU_CBFRSYNRA31` `0x147C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`SSD_Index` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`StreamID` `RW 0x0`
`SMMU_CBA2R31` `0x187C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`MONC` `RW 0x0`	`VA64` `RW 0x0`
`SMMU_ITCTRL` `0x2000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`tbu_index` `RW 0x0`			`MODULE` `RW 0x0`	`RAM_DATA` `RW 0x0`	`RAM_MODE` `RW 0x0`	`INTGMODE` `RW 0x0`
`SMMU_ITIP` `0x2004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SPINDEN` `RO 0x0`
`SMMU_ITOP_GLBL` `0x2008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`TCU_RAM_DATA` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`GLBLSF1` `RO 0x0`	`Reserved`							`GLBLNSF1` `RO 0x0`	`Reserved`
`SMMU_ITOP_PERF_INDEX` `0x200C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`WAY_IPA2PA_PF` `WO 0x0`		`Reserved`							`IPA2PA_PF_INDEX` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`WAY_MTLB_WC` `WO 0x0`		`Reserved`		`MTLB_WC_INDEX` `WO 0x0`
`SMMU_ITOP_CXT0TO31_RAM0` `0x2010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RAM_DATA` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RAM_DATA` `WO 0x0`
`SMMU_TBUQOS0` `0x2100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`												`QOSTBU4` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`QOSTBU3` `RW 0x0`				`QOSTBU2` `RW 0x0`				`QOSTBU1` `RW 0x0`				`QOSTBU0` `RW 0x0`
`SMMU_PER` `0x2200` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PER_TCU` `RO 0x0`								`PER_TBU` `RO 0x0`
`SMMU_TBU_PWR_STATUS` `0x2204` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`state` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`state` `RO 0x0`
`PMEVCNTR0` `0x3000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN0` `RW 0x0`
`PMEVCNTR1` `0x3004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN1` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN1` `RW 0x0`
`PMEVCNTR2` `0x3008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN2` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN2` `RW 0x0`
`PMEVCNTR3` `0x300C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN3` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN3` `RW 0x0`
`PMEVCNTR4` `0x3010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN0` `RW 0x0`
`PMEVCNTR5` `0x3014` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN1` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN1` `RW 0x0`
`PMEVCNTR6` `0x3018` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN2` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN2` `RW 0x0`
`PMEVCNTR7` `0x301C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN3` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN3` `RW 0x0`
`PMEVCNTR8` `0x3020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN0` `RW 0x0`
`PMEVCNTR9` `0x3024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN1` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN1` `RW 0x0`
`PMEVCNTR10` `0x3028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN2` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN2` `RW 0x0`
`PMEVCNTR11` `0x302C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN3` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN3` `RW 0x0`
`PMEVCNTR12` `0x3030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN0` `RW 0x0`
`PMEVCNTR13` `0x3034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN1` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN1` `RW 0x0`
`PMEVCNTR14` `0x3038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN2` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN2` `RW 0x0`
`PMEVCNTR15` `0x303C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN3` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN3` `RW 0x0`
`PMEVCNTR16` `0x3040` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN0` `RW 0x0`
`PMEVCNTR17` `0x3044` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN1` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN1` `RW 0x0`
`PMEVCNTR18` `0x3048` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN2` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN2` `RW 0x0`
`PMEVCNTR19` `0x304C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PMN3` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PMN3` `RW 0x0`
`PMEVTYPER0` `0x3400` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER1` `0x3404` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER2` `0x3408` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER3` `0x340C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER4` `0x3410` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER5` `0x3414` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER6` `0x3418` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER7` `0x341C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER8` `0x3420` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER9` `0x3424` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER10` `0x3428` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER11` `0x342C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER12` `0x3430` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER13` `0x3434` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER14` `0x3438` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER15` `0x343C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER16` `0x3440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER17` `0x3444` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER18` `0x3448` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMEVTYPER19` `0x344C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`PMCGCR0` `0x3800` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`CGNC` `RO 0x4`				`Reserved`	`SIDG` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`X` `RW 0x0`	`E` `RW 0x0`	`CBAEN` `RW 0x0`	`TCEFCFG` `RW 0x0`		`Reserved`			`NDX` `RW 0x0`
`PMCGCR1` `0x3804` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`CGNC` `RO 0x4`				`Reserved`	`SIDG` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`X` `RW 0x0`	`E` `RW 0x0`	`CBAEN` `RW 0x0`	`TCEFCFG` `RW 0x0`		`Reserved`			`NDX` `RW 0x0`
`PMCGCR2` `0x3808` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`CGNC` `RO 0x4`				`Reserved`	`SIDG` `RO 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`X` `RW 0x0`	`E` `RW 0x0`	`CBAEN` `RW 0x0`	`TCEFCFG` `RW 0x0`		`Reserved`			`NDX` `RW 0x0`
`PMCGCR3` `0x380C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`CGNC` `RO 0x4`				`Reserved`	`SIDG` `RO 0x3`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`X` `RW 0x0`	`E` `RW 0x0`	`CBAEN` `RW 0x0`	`TCEFCFG` `RW 0x0`		`Reserved`			`NDX` `RW 0x0`
`PMCGCR4` `0x3810` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`CGNC` `RO 0x4`				`Reserved`	`SIDG` `RO 0x4`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`X` `RW 0x0`	`E` `RW 0x0`	`CBAEN` `RW 0x0`	`TCEFCFG` `RW 0x0`		`Reserved`			`NDX` `RW 0x0`
`PMCGSMR0` `0x3A00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`ID` `RW 0x0`
`PMCGSMR1` `0x3A04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`ID` `RW 0x0`
`PMCGSMR2` `0x3A08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`ID` `RW 0x0`
`PMCGSMR3` `0x3A0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`ID` `RW 0x0`
`PMCGSMR4` `0x3A10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`MASK` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`ID` `RW 0x0`
`PMCNTENSET` `0x3C00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`												`P19` `WO 0x0`	`P18` `WO 0x0`	`P17` `WO 0x0`	`P16` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`P15` `WO 0x0`	`P14` `WO 0x0`	`P13` `WO 0x0`	`P12` `WO 0x0`	`P11` `WO 0x0`	`P10` `WO 0x0`	`P9` `WO 0x0`	`P8` `WO 0x0`	`P7` `WO 0x0`	`P6` `WO 0x0`	`P5` `WO 0x0`	`P4` `WO 0x0`	`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`PMCNTENCLR` `0x3C20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`												`P19` `WO 0x0`	`P18` `WO 0x0`	`P17` `WO 0x0`	`P16` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`P15` `WO 0x0`	`P14` `WO 0x0`	`P13` `WO 0x0`	`P12` `WO 0x0`	`P11` `WO 0x0`	`P10` `WO 0x0`	`P9` `WO 0x0`	`P8` `WO 0x0`	`P7` `WO 0x0`	`P6` `WO 0x0`	`P5` `WO 0x0`	`P4` `WO 0x0`	`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`PMINTENSET` `0x3C40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`												`P19` `WO 0x0`	`P18` `WO 0x0`	`P17` `WO 0x0`	`P16` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`P15` `WO 0x0`	`P14` `WO 0x0`	`P13` `WO 0x0`	`P12` `WO 0x0`	`P11` `WO 0x0`	`P10` `WO 0x0`	`P9` `WO 0x0`	`P8` `WO 0x0`	`P7` `WO 0x0`	`P6` `WO 0x0`	`P5` `WO 0x0`	`P4` `WO 0x0`	`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`PMINTENCLR` `0x3C60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`												`P19` `WO 0x0`	`P18` `WO 0x0`	`P17` `WO 0x0`	`P16` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`P15` `WO 0x0`	`P14` `WO 0x0`	`P13` `WO 0x0`	`P12` `WO 0x0`	`P11` `WO 0x0`	`P10` `WO 0x0`	`P9` `WO 0x0`	`P8` `WO 0x0`	`P7` `WO 0x0`	`P6` `WO 0x0`	`P5` `WO 0x0`	`P4` `WO 0x0`	`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`PMOVSCLR` `0x3C80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`												`P19` `WO 0x0`	`P18` `WO 0x0`	`P17` `WO 0x0`	`P16` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`P15` `WO 0x0`	`P14` `WO 0x0`	`P13` `WO 0x0`	`P12` `WO 0x0`	`P11` `WO 0x0`	`P10` `WO 0x0`	`P9` `WO 0x0`	`P8` `WO 0x0`	`P7` `WO 0x0`	`P6` `WO 0x0`	`P5` `WO 0x0`	`P4` `WO 0x0`	`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`PMOVSSET` `0x3CC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`												`P19` `WO 0x0`	`P18` `WO 0x0`	`P17` `WO 0x0`	`P16` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`P15` `WO 0x0`	`P14` `WO 0x0`	`P13` `WO 0x0`	`P12` `WO 0x0`	`P11` `WO 0x0`	`P10` `WO 0x0`	`P9` `WO 0x0`	`P8` `WO 0x0`	`P7` `WO 0x0`	`P6` `WO 0x0`	`P5` `WO 0x0`	`P4` `WO 0x0`	`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`PMCFGR` `0x3E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x4`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x13`
`PMCR` `0x3E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`PMCEID0` `0x3E20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`PMAUTHSTATUS` `0x3FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`PMDEVTYPE` `0x3FCC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`T` `RO 0x5`				`C` `RO 0x6`
`smmu_ssd_reg_0` `0x4000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8_31` `RO 0xFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8_31` `RO 0xFFFFFF`								`ssd_index_7` `RW 0x1`	`ssd_index_6` `RW 0x1`	`ssd_index_5` `RW 0x1`	`ssd_index_4` `RW 0x1`	`ssd_index_3` `RW 0x0`	`ssd_index_2` `RW 0x0`	`ssd_index_1` `RW 0x0`	`ssd_index_0` `RW 0x0`
`smmu_ssd_reg_1` `0x4004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32_63` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32_63` `RO 0xFFFFFFFF`
`smmu_ssd_reg_2` `0x4008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_64_95` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_64_95` `RO 0xFFFFFFFF`
`smmu_ssd_reg_3` `0x400C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_96_127` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_96_127` `RO 0xFFFFFFFF`
`smmu_ssd_reg_4` `0x4010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_128_159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_128_159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_5` `0x4014` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_160_191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_160_191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_6` `0x4018` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_192_223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_192_223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_7` `0x401C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_224_255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_224_255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_8` `0x4020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_256_287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_256_287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_9` `0x4024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_288_319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_288_319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_10` `0x4028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_320_351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_320_351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_11` `0x402C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_352_383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_352_383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_12` `0x4030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_384_415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_384_415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_13` `0x4034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_416_447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_416_447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_14` `0x4038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_448_479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_448_479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_15` `0x403C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_480_511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_480_511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_16` `0x4040` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_512_543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_512_543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_17` `0x4044` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_544_575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_544_575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_18` `0x4048` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_576_607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_576_607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_19` `0x404C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_608_639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_608_639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_20` `0x4050` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_640_671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_640_671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_21` `0x4054` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_672_703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_672_703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_22` `0x4058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_704_735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_704_735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_23` `0x405C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_736_767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_736_767` `RO 0xFFFFFFFF`
`smmu_ssd_reg_24` `0x4060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_768_799` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_768_799` `RO 0xFFFFFFFF`
`smmu_ssd_reg_25` `0x4064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_800_831` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_800_831` `RO 0xFFFFFFFF`
`smmu_ssd_reg_26` `0x4068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_832_863` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_832_863` `RO 0xFFFFFFFF`
`smmu_ssd_reg_27` `0x406C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_864_895` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_864_895` `RO 0xFFFFFFFF`
`smmu_ssd_reg_28` `0x4070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_896_927` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_896_927` `RO 0xFFFFFFFF`
`smmu_ssd_reg_29` `0x4074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_928_959` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_928_959` `RO 0xFFFFFFFF`
`smmu_ssd_reg_30` `0x4078` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_960_991` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_960_991` `RO 0xFFFFFFFF`
`smmu_ssd_reg_31` `0x407C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_992_1023` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_992_1023` `RO 0xFFFFFFFF`
`smmu_ssd_reg_32` `0x4080` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1032_1055` `RO 0xFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1032_1055` `RO 0xFFFFFF`								`ssd_index_1031` `RW 0x1`	`ssd_index_1030` `RW 0x1`	`ssd_index_1029` `RW 0x1`	`ssd_index_1028` `RW 0x1`	`ssd_index_1027` `RW 0x0`	`ssd_index_1026` `RW 0x0`	`ssd_index_1025` `RW 0x0`	`ssd_index_1024` `RW 0x0`
`smmu_ssd_reg_33` `0x4084` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1056_1087` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1056_1087` `RO 0xFFFFFFFF`
`smmu_ssd_reg_34` `0x4088` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1088_1119` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1088_1119` `RO 0xFFFFFFFF`
`smmu_ssd_reg_35` `0x408C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1120_1151` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1120_1151` `RO 0xFFFFFFFF`
`smmu_ssd_reg_36` `0x4090` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1152_1183` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1152_1183` `RO 0xFFFFFFFF`
`smmu_ssd_reg_37` `0x4094` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1184_1215` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1184_1215` `RO 0xFFFFFFFF`
`smmu_ssd_reg_38` `0x4098` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1216_1247` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1216_1247` `RO 0xFFFFFFFF`
`smmu_ssd_reg_39` `0x409C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1248_1279` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1248_1279` `RO 0xFFFFFFFF`
`smmu_ssd_reg_40` `0x40A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1280_1311` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1280_1311` `RO 0xFFFFFFFF`
`smmu_ssd_reg_41` `0x40A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1312_1343` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1312_1343` `RO 0xFFFFFFFF`
`smmu_ssd_reg_42` `0x40A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1344_1375` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1344_1375` `RO 0xFFFFFFFF`
`smmu_ssd_reg_43` `0x40AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1376_1407` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1376_1407` `RO 0xFFFFFFFF`
`smmu_ssd_reg_44` `0x40B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1408_1439` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1408_1439` `RO 0xFFFFFFFF`
`smmu_ssd_reg_45` `0x40B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1440_1471` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1440_1471` `RO 0xFFFFFFFF`
`smmu_ssd_reg_46` `0x40B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1472_1503` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1472_1503` `RO 0xFFFFFFFF`
`smmu_ssd_reg_47` `0x40BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1504_1535` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1504_1535` `RO 0xFFFFFFFF`
`smmu_ssd_reg_48` `0x40C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1536_1567` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1536_1567` `RO 0xFFFFFFFF`
`smmu_ssd_reg_49` `0x40C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1568_1599` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1568_1599` `RO 0xFFFFFFFF`
`smmu_ssd_reg_50` `0x40C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1600_1631` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1600_1631` `RO 0xFFFFFFFF`
`smmu_ssd_reg_51` `0x40CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1632_1663` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1632_1663` `RO 0xFFFFFFFF`
`smmu_ssd_reg_52` `0x40D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1664_1695` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1664_1695` `RO 0xFFFFFFFF`
`smmu_ssd_reg_53` `0x40D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1696_1727` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1696_1727` `RO 0xFFFFFFFF`
`smmu_ssd_reg_54` `0x40D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1728_1759` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1728_1759` `RO 0xFFFFFFFF`
`smmu_ssd_reg_55` `0x40DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1760_1791` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1760_1791` `RO 0xFFFFFFFF`
`smmu_ssd_reg_56` `0x40E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1792_1823` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1792_1823` `RO 0xFFFFFFFF`
`smmu_ssd_reg_57` `0x40E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1824_1855` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1824_1855` `RO 0xFFFFFFFF`
`smmu_ssd_reg_58` `0x40E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1856_1887` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1856_1887` `RO 0xFFFFFFFF`
`smmu_ssd_reg_59` `0x40EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1888_1919` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1888_1919` `RO 0xFFFFFFFF`
`smmu_ssd_reg_60` `0x40F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1920_1951` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1920_1951` `RO 0xFFFFFFFF`
`smmu_ssd_reg_61` `0x40F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1952_1983` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1952_1983` `RO 0xFFFFFFFF`
`smmu_ssd_reg_62` `0x40F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_1984_2015` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_1984_2015` `RO 0xFFFFFFFF`
`smmu_ssd_reg_63` `0x40FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2016_2047` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2016_2047` `RO 0xFFFFFFFF`
`smmu_ssd_reg_64` `0x4100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2056_2079` `RO 0xFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2056_2079` `RO 0xFFFFFF`								`ssd_index_2055` `RW 0x1`	`ssd_index_2054` `RW 0x1`	`ssd_index_2053` `RW 0x1`	`ssd_index_2052` `RW 0x1`	`ssd_index_2051` `RW 0x0`	`ssd_index_2050` `RW 0x0`	`ssd_index_2049` `RW 0x0`	`ssd_index_2048` `RW 0x0`
`smmu_ssd_reg_65` `0x4104` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2080_2111` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2080_2111` `RO 0xFFFFFFFF`
`smmu_ssd_reg_66` `0x4108` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2112_2143` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2112_2143` `RO 0xFFFFFFFF`
`smmu_ssd_reg_67` `0x410C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2144_2175` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2144_2175` `RO 0xFFFFFFFF`
`smmu_ssd_reg_68` `0x4110` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2176_2207` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2176_2207` `RO 0xFFFFFFFF`
`smmu_ssd_reg_69` `0x4114` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2208_2239` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2208_2239` `RO 0xFFFFFFFF`
`smmu_ssd_reg_70` `0x4118` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2240_2271` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2240_2271` `RO 0xFFFFFFFF`
`smmu_ssd_reg_71` `0x411C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2272_2303` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2272_2303` `RO 0xFFFFFFFF`
`smmu_ssd_reg_72` `0x4120` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2304_2335` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2304_2335` `RO 0xFFFFFFFF`
`smmu_ssd_reg_73` `0x4124` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2336_2367` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2336_2367` `RO 0xFFFFFFFF`
`smmu_ssd_reg_74` `0x4128` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2368_2399` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2368_2399` `RO 0xFFFFFFFF`
`smmu_ssd_reg_75` `0x412C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2400_2431` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2400_2431` `RO 0xFFFFFFFF`
`smmu_ssd_reg_76` `0x4130` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2432_2463` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2432_2463` `RO 0xFFFFFFFF`
`smmu_ssd_reg_77` `0x4134` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2464_2495` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2464_2495` `RO 0xFFFFFFFF`
`smmu_ssd_reg_78` `0x4138` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2496_2527` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2496_2527` `RO 0xFFFFFFFF`
`smmu_ssd_reg_79` `0x413C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2528_2559` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2528_2559` `RO 0xFFFFFFFF`
`smmu_ssd_reg_80` `0x4140` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2560_2591` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2560_2591` `RO 0xFFFFFFFF`
`smmu_ssd_reg_81` `0x4144` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2592_2623` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2592_2623` `RO 0xFFFFFFFF`
`smmu_ssd_reg_82` `0x4148` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2624_2655` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2624_2655` `RO 0xFFFFFFFF`
`smmu_ssd_reg_83` `0x414C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2656_2687` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2656_2687` `RO 0xFFFFFFFF`
`smmu_ssd_reg_84` `0x4150` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2688_2719` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2688_2719` `RO 0xFFFFFFFF`
`smmu_ssd_reg_85` `0x4154` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2720_2751` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2720_2751` `RO 0xFFFFFFFF`
`smmu_ssd_reg_86` `0x4158` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2752_2783` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2752_2783` `RO 0xFFFFFFFF`
`smmu_ssd_reg_87` `0x415C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2784_2815` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2784_2815` `RO 0xFFFFFFFF`
`smmu_ssd_reg_88` `0x4160` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2816_2847` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2816_2847` `RO 0xFFFFFFFF`
`smmu_ssd_reg_89` `0x4164` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2848_2879` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2848_2879` `RO 0xFFFFFFFF`
`smmu_ssd_reg_90` `0x4168` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2880_2911` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2880_2911` `RO 0xFFFFFFFF`
`smmu_ssd_reg_91` `0x416C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2912_2943` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2912_2943` `RO 0xFFFFFFFF`
`smmu_ssd_reg_92` `0x4170` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2944_2975` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2944_2975` `RO 0xFFFFFFFF`
`smmu_ssd_reg_93` `0x4174` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_2976_3007` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_2976_3007` `RO 0xFFFFFFFF`
`smmu_ssd_reg_94` `0x4178` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3008_3039` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3008_3039` `RO 0xFFFFFFFF`
`smmu_ssd_reg_95` `0x417C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3040_3071` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3040_3071` `RO 0xFFFFFFFF`
`smmu_ssd_reg_96` `0x4180` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3080_3103` `RO 0xFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3080_3103` `RO 0xFFFFFF`								`ssd_index_3079` `RW 0x1`	`ssd_index_3078` `RW 0x1`	`ssd_index_3077` `RW 0x1`	`ssd_index_3076` `RW 0x1`	`ssd_index_3075` `RW 0x0`	`ssd_index_3074` `RW 0x0`	`ssd_index_3073` `RW 0x0`	`ssd_index_3072` `RW 0x0`
`smmu_ssd_reg_97` `0x4184` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3104_3135` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3104_3135` `RO 0xFFFFFFFF`
`smmu_ssd_reg_98` `0x4188` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3136_3167` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3136_3167` `RO 0xFFFFFFFF`
`smmu_ssd_reg_99` `0x418C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3168_3199` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3168_3199` `RO 0xFFFFFFFF`
`smmu_ssd_reg_100` `0x4190` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3200_3231` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3200_3231` `RO 0xFFFFFFFF`
`smmu_ssd_reg_101` `0x4194` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3232_3263` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3232_3263` `RO 0xFFFFFFFF`
`smmu_ssd_reg_102` `0x4198` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3264_3295` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3264_3295` `RO 0xFFFFFFFF`
`smmu_ssd_reg_103` `0x419C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3296_3327` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3296_3327` `RO 0xFFFFFFFF`
`smmu_ssd_reg_104` `0x41A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3328_3359` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3328_3359` `RO 0xFFFFFFFF`
`smmu_ssd_reg_105` `0x41A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3360_3391` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3360_3391` `RO 0xFFFFFFFF`
`smmu_ssd_reg_106` `0x41A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3392_3423` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3392_3423` `RO 0xFFFFFFFF`
`smmu_ssd_reg_107` `0x41AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3424_3455` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3424_3455` `RO 0xFFFFFFFF`
`smmu_ssd_reg_108` `0x41B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3456_3487` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3456_3487` `RO 0xFFFFFFFF`
`smmu_ssd_reg_109` `0x41B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3488_3519` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3488_3519` `RO 0xFFFFFFFF`
`smmu_ssd_reg_110` `0x41B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3520_3551` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3520_3551` `RO 0xFFFFFFFF`
`smmu_ssd_reg_111` `0x41BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3552_3583` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3552_3583` `RO 0xFFFFFFFF`
`smmu_ssd_reg_112` `0x41C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3584_3615` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3584_3615` `RO 0xFFFFFFFF`
`smmu_ssd_reg_113` `0x41C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3616_3647` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3616_3647` `RO 0xFFFFFFFF`
`smmu_ssd_reg_114` `0x41C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3648_3679` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3648_3679` `RO 0xFFFFFFFF`
`smmu_ssd_reg_115` `0x41CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3680_3711` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3680_3711` `RO 0xFFFFFFFF`
`smmu_ssd_reg_116` `0x41D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3712_3743` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3712_3743` `RO 0xFFFFFFFF`
`smmu_ssd_reg_117` `0x41D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3744_3775` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3744_3775` `RO 0xFFFFFFFF`
`smmu_ssd_reg_118` `0x41D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3776_3807` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3776_3807` `RO 0xFFFFFFFF`
`smmu_ssd_reg_119` `0x41DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3808_3839` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3808_3839` `RO 0xFFFFFFFF`
`smmu_ssd_reg_120` `0x41E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3840_3871` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3840_3871` `RO 0xFFFFFFFF`
`smmu_ssd_reg_121` `0x41E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3872_3903` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3872_3903` `RO 0xFFFFFFFF`
`smmu_ssd_reg_122` `0x41E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3904_3935` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3904_3935` `RO 0xFFFFFFFF`
`smmu_ssd_reg_123` `0x41EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3936_3967` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3936_3967` `RO 0xFFFFFFFF`
`smmu_ssd_reg_124` `0x41F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_3968_3999` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_3968_3999` `RO 0xFFFFFFFF`
`smmu_ssd_reg_125` `0x41F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4000_4031` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4000_4031` `RO 0xFFFFFFFF`
`smmu_ssd_reg_126` `0x41F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4032_4063` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4032_4063` `RO 0xFFFFFFFF`
`smmu_ssd_reg_127` `0x41FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4064_4095` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4064_4095` `RO 0xFFFFFFFF`
`smmu_ssd_reg_128` `0x4200` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4104_4127` `RO 0xFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4104_4127` `RO 0xFFFFFF`								`ssd_index_4103` `RW 0x1`	`ssd_index_4102` `RW 0x1`	`ssd_index_4101` `RW 0x1`	`ssd_index_4100` `RW 0x1`	`ssd_index_4099` `RW 0x0`	`ssd_index_4098` `RW 0x0`	`ssd_index_4097` `RW 0x0`	`ssd_index_4096` `RW 0x0`
`smmu_ssd_reg_129` `0x4204` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4128_4159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4128_4159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_130` `0x4208` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4160_4191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4160_4191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_131` `0x420C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4192_4223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4192_4223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_132` `0x4210` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4224_4255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4224_4255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_133` `0x4214` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4256_4287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4256_4287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_134` `0x4218` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4288_4319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4288_4319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_135` `0x421C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4320_4351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4320_4351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_136` `0x4220` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4352_4383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4352_4383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_137` `0x4224` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4384_4415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4384_4415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_138` `0x4228` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4416_4447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4416_4447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_139` `0x422C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4448_4479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4448_4479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_140` `0x4230` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4480_4511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4480_4511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_141` `0x4234` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4512_4543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4512_4543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_142` `0x4238` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4544_4575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4544_4575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_143` `0x423C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4576_4607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4576_4607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_144` `0x4240` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4608_4639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4608_4639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_145` `0x4244` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4640_4671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4640_4671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_146` `0x4248` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4672_4703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4672_4703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_147` `0x424C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4704_4735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4704_4735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_148` `0x4250` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4736_4767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4736_4767` `RO 0xFFFFFFFF`
`smmu_ssd_reg_149` `0x4254` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4768_4799` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4768_4799` `RO 0xFFFFFFFF`
`smmu_ssd_reg_150` `0x4258` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4800_4831` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4800_4831` `RO 0xFFFFFFFF`
`smmu_ssd_reg_151` `0x425C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4832_4863` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4832_4863` `RO 0xFFFFFFFF`
`smmu_ssd_reg_152` `0x4260` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4864_4895` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4864_4895` `RO 0xFFFFFFFF`
`smmu_ssd_reg_153` `0x4264` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4896_4927` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4896_4927` `RO 0xFFFFFFFF`
`smmu_ssd_reg_154` `0x4268` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4928_4959` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4928_4959` `RO 0xFFFFFFFF`
`smmu_ssd_reg_155` `0x426C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4960_4991` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4960_4991` `RO 0xFFFFFFFF`
`smmu_ssd_reg_156` `0x4270` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_4992_5023` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_4992_5023` `RO 0xFFFFFFFF`
`smmu_ssd_reg_157` `0x4274` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5024_5055` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5024_5055` `RO 0xFFFFFFFF`
`smmu_ssd_reg_158` `0x4278` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5056_5087` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5056_5087` `RO 0xFFFFFFFF`
`smmu_ssd_reg_159` `0x427C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5088_5119` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5088_5119` `RO 0xFFFFFFFF`
`smmu_ssd_reg_160` `0x4280` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5120_5151` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5120_5151` `RO 0xFFFFFFFF`
`smmu_ssd_reg_161` `0x4284` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5152_5183` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5152_5183` `RO 0xFFFFFFFF`
`smmu_ssd_reg_162` `0x4288` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5184_5215` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5184_5215` `RO 0xFFFFFFFF`
`smmu_ssd_reg_163` `0x428C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5216_5247` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5216_5247` `RO 0xFFFFFFFF`
`smmu_ssd_reg_164` `0x4290` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5248_5279` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5248_5279` `RO 0xFFFFFFFF`
`smmu_ssd_reg_165` `0x4294` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5280_5311` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5280_5311` `RO 0xFFFFFFFF`
`smmu_ssd_reg_166` `0x4298` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5312_5343` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5312_5343` `RO 0xFFFFFFFF`
`smmu_ssd_reg_167` `0x429C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5344_5375` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5344_5375` `RO 0xFFFFFFFF`
`smmu_ssd_reg_168` `0x42A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5376_5407` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5376_5407` `RO 0xFFFFFFFF`
`smmu_ssd_reg_169` `0x42A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5408_5439` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5408_5439` `RO 0xFFFFFFFF`
`smmu_ssd_reg_170` `0x42A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5440_5471` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5440_5471` `RO 0xFFFFFFFF`
`smmu_ssd_reg_171` `0x42AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5472_5503` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5472_5503` `RO 0xFFFFFFFF`
`smmu_ssd_reg_172` `0x42B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5504_5535` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5504_5535` `RO 0xFFFFFFFF`
`smmu_ssd_reg_173` `0x42B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5536_5567` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5536_5567` `RO 0xFFFFFFFF`
`smmu_ssd_reg_174` `0x42B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5568_5599` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5568_5599` `RO 0xFFFFFFFF`
`smmu_ssd_reg_175` `0x42BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5600_5631` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5600_5631` `RO 0xFFFFFFFF`
`smmu_ssd_reg_176` `0x42C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5632_5663` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5632_5663` `RO 0xFFFFFFFF`
`smmu_ssd_reg_177` `0x42C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5664_5695` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5664_5695` `RO 0xFFFFFFFF`
`smmu_ssd_reg_178` `0x42C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5696_5727` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5696_5727` `RO 0xFFFFFFFF`
`smmu_ssd_reg_179` `0x42CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5728_5759` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5728_5759` `RO 0xFFFFFFFF`
`smmu_ssd_reg_180` `0x42D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5760_5791` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5760_5791` `RO 0xFFFFFFFF`
`smmu_ssd_reg_181` `0x42D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5792_5823` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5792_5823` `RO 0xFFFFFFFF`
`smmu_ssd_reg_182` `0x42D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5824_5855` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5824_5855` `RO 0xFFFFFFFF`
`smmu_ssd_reg_183` `0x42DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5856_5887` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5856_5887` `RO 0xFFFFFFFF`
`smmu_ssd_reg_184` `0x42E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5888_5919` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5888_5919` `RO 0xFFFFFFFF`
`smmu_ssd_reg_185` `0x42E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5920_5951` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5920_5951` `RO 0xFFFFFFFF`
`smmu_ssd_reg_186` `0x42E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5952_5983` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5952_5983` `RO 0xFFFFFFFF`
`smmu_ssd_reg_187` `0x42EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_5984_6015` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_5984_6015` `RO 0xFFFFFFFF`
`smmu_ssd_reg_188` `0x42F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6016_6047` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6016_6047` `RO 0xFFFFFFFF`
`smmu_ssd_reg_189` `0x42F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6048_6079` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6048_6079` `RO 0xFFFFFFFF`
`smmu_ssd_reg_190` `0x42F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6080_6111` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6080_6111` `RO 0xFFFFFFFF`
`smmu_ssd_reg_191` `0x42FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6112_6143` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6112_6143` `RO 0xFFFFFFFF`
`smmu_ssd_reg_192` `0x4300` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6144_6175` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6144_6175` `RO 0xFFFFFFFF`
`smmu_ssd_reg_193` `0x4304` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6176_6207` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6176_6207` `RO 0xFFFFFFFF`
`smmu_ssd_reg_194` `0x4308` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6208_6239` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6208_6239` `RO 0xFFFFFFFF`
`smmu_ssd_reg_195` `0x430C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6240_6271` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6240_6271` `RO 0xFFFFFFFF`
`smmu_ssd_reg_196` `0x4310` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6272_6303` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6272_6303` `RO 0xFFFFFFFF`
`smmu_ssd_reg_197` `0x4314` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6304_6335` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6304_6335` `RO 0xFFFFFFFF`
`smmu_ssd_reg_198` `0x4318` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6336_6367` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6336_6367` `RO 0xFFFFFFFF`
`smmu_ssd_reg_199` `0x431C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6368_6399` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6368_6399` `RO 0xFFFFFFFF`
`smmu_ssd_reg_200` `0x4320` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6400_6431` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6400_6431` `RO 0xFFFFFFFF`
`smmu_ssd_reg_201` `0x4324` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6432_6463` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6432_6463` `RO 0xFFFFFFFF`
`smmu_ssd_reg_202` `0x4328` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6464_6495` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6464_6495` `RO 0xFFFFFFFF`
`smmu_ssd_reg_203` `0x432C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6496_6527` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6496_6527` `RO 0xFFFFFFFF`
`smmu_ssd_reg_204` `0x4330` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6528_6559` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6528_6559` `RO 0xFFFFFFFF`
`smmu_ssd_reg_205` `0x4334` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6560_6591` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6560_6591` `RO 0xFFFFFFFF`
`smmu_ssd_reg_206` `0x4338` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6592_6623` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6592_6623` `RO 0xFFFFFFFF`
`smmu_ssd_reg_207` `0x433C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6624_6655` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6624_6655` `RO 0xFFFFFFFF`
`smmu_ssd_reg_208` `0x4340` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6656_6687` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6656_6687` `RO 0xFFFFFFFF`
`smmu_ssd_reg_209` `0x4344` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6688_6719` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6688_6719` `RO 0xFFFFFFFF`
`smmu_ssd_reg_210` `0x4348` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6720_6751` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6720_6751` `RO 0xFFFFFFFF`
`smmu_ssd_reg_211` `0x434C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6752_6783` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6752_6783` `RO 0xFFFFFFFF`
`smmu_ssd_reg_212` `0x4350` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6784_6815` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6784_6815` `RO 0xFFFFFFFF`
`smmu_ssd_reg_213` `0x4354` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6816_6847` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6816_6847` `RO 0xFFFFFFFF`
`smmu_ssd_reg_214` `0x4358` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6848_6879` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6848_6879` `RO 0xFFFFFFFF`
`smmu_ssd_reg_215` `0x435C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6880_6911` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6880_6911` `RO 0xFFFFFFFF`
`smmu_ssd_reg_216` `0x4360` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6912_6943` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6912_6943` `RO 0xFFFFFFFF`
`smmu_ssd_reg_217` `0x4364` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6944_6975` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6944_6975` `RO 0xFFFFFFFF`
`smmu_ssd_reg_218` `0x4368` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_6976_7007` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_6976_7007` `RO 0xFFFFFFFF`
`smmu_ssd_reg_219` `0x436C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7008_7039` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7008_7039` `RO 0xFFFFFFFF`
`smmu_ssd_reg_220` `0x4370` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7040_7071` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7040_7071` `RO 0xFFFFFFFF`
`smmu_ssd_reg_221` `0x4374` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7072_7103` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7072_7103` `RO 0xFFFFFFFF`
`smmu_ssd_reg_222` `0x4378` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7104_7135` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7104_7135` `RO 0xFFFFFFFF`
`smmu_ssd_reg_223` `0x437C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7136_7167` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7136_7167` `RO 0xFFFFFFFF`
`smmu_ssd_reg_224` `0x4380` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7168_7199` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7168_7199` `RO 0xFFFFFFFF`
`smmu_ssd_reg_225` `0x4384` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7200_7231` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7200_7231` `RO 0xFFFFFFFF`
`smmu_ssd_reg_226` `0x4388` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7232_7263` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7232_7263` `RO 0xFFFFFFFF`
`smmu_ssd_reg_227` `0x438C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7264_7295` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7264_7295` `RO 0xFFFFFFFF`
`smmu_ssd_reg_228` `0x4390` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7296_7327` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7296_7327` `RO 0xFFFFFFFF`
`smmu_ssd_reg_229` `0x4394` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7328_7359` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7328_7359` `RO 0xFFFFFFFF`
`smmu_ssd_reg_230` `0x4398` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7360_7391` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7360_7391` `RO 0xFFFFFFFF`
`smmu_ssd_reg_231` `0x439C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7392_7423` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7392_7423` `RO 0xFFFFFFFF`
`smmu_ssd_reg_232` `0x43A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7424_7455` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7424_7455` `RO 0xFFFFFFFF`
`smmu_ssd_reg_233` `0x43A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7456_7487` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7456_7487` `RO 0xFFFFFFFF`
`smmu_ssd_reg_234` `0x43A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7488_7519` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7488_7519` `RO 0xFFFFFFFF`
`smmu_ssd_reg_235` `0x43AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7520_7551` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7520_7551` `RO 0xFFFFFFFF`
`smmu_ssd_reg_236` `0x43B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7552_7583` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7552_7583` `RO 0xFFFFFFFF`
`smmu_ssd_reg_237` `0x43B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7584_7615` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7584_7615` `RO 0xFFFFFFFF`
`smmu_ssd_reg_238` `0x43B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7616_7647` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7616_7647` `RO 0xFFFFFFFF`
`smmu_ssd_reg_239` `0x43BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7648_7679` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7648_7679` `RO 0xFFFFFFFF`
`smmu_ssd_reg_240` `0x43C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7680_7711` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7680_7711` `RO 0xFFFFFFFF`
`smmu_ssd_reg_241` `0x43C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7712_7743` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7712_7743` `RO 0xFFFFFFFF`
`smmu_ssd_reg_242` `0x43C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7744_7775` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7744_7775` `RO 0xFFFFFFFF`
`smmu_ssd_reg_243` `0x43CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7776_7807` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7776_7807` `RO 0xFFFFFFFF`
`smmu_ssd_reg_244` `0x43D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7808_7839` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7808_7839` `RO 0xFFFFFFFF`
`smmu_ssd_reg_245` `0x43D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7840_7871` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7840_7871` `RO 0xFFFFFFFF`
`smmu_ssd_reg_246` `0x43D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7872_7903` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7872_7903` `RO 0xFFFFFFFF`
`smmu_ssd_reg_247` `0x43DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7904_7935` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7904_7935` `RO 0xFFFFFFFF`
`smmu_ssd_reg_248` `0x43E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7936_7967` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7936_7967` `RO 0xFFFFFFFF`
`smmu_ssd_reg_249` `0x43E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_7968_7999` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_7968_7999` `RO 0xFFFFFFFF`
`smmu_ssd_reg_250` `0x43E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8000_8031` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8000_8031` `RO 0xFFFFFFFF`
`smmu_ssd_reg_251` `0x43EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8032_8063` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8032_8063` `RO 0xFFFFFFFF`
`smmu_ssd_reg_252` `0x43F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8064_8095` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8064_8095` `RO 0xFFFFFFFF`
`smmu_ssd_reg_253` `0x43F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8096_8127` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8096_8127` `RO 0xFFFFFFFF`
`smmu_ssd_reg_254` `0x43F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8128_8159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8128_8159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_255` `0x43FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8160_8191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8160_8191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_256` `0x4400` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8192_8223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8192_8223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_257` `0x4404` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8224_8255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8224_8255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_258` `0x4408` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8256_8287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8256_8287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_259` `0x440C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8288_8319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8288_8319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_260` `0x4410` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8320_8351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8320_8351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_261` `0x4414` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8352_8383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8352_8383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_262` `0x4418` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8384_8415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8384_8415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_263` `0x441C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8416_8447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8416_8447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_264` `0x4420` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8448_8479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8448_8479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_265` `0x4424` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8480_8511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8480_8511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_266` `0x4428` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8512_8543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8512_8543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_267` `0x442C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8544_8575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8544_8575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_268` `0x4430` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8576_8607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8576_8607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_269` `0x4434` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8608_8639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8608_8639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_270` `0x4438` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8640_8671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8640_8671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_271` `0x443C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8672_8703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8672_8703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_272` `0x4440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8704_8735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8704_8735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_273` `0x4444` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8736_8767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8736_8767` `RO 0xFFFFFFFF`
`smmu_ssd_reg_274` `0x4448` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8768_8799` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8768_8799` `RO 0xFFFFFFFF`
`smmu_ssd_reg_275` `0x444C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8800_8831` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8800_8831` `RO 0xFFFFFFFF`
`smmu_ssd_reg_276` `0x4450` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8832_8863` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8832_8863` `RO 0xFFFFFFFF`
`smmu_ssd_reg_277` `0x4454` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8864_8895` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8864_8895` `RO 0xFFFFFFFF`
`smmu_ssd_reg_278` `0x4458` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8896_8927` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8896_8927` `RO 0xFFFFFFFF`
`smmu_ssd_reg_279` `0x445C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8928_8959` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8928_8959` `RO 0xFFFFFFFF`
`smmu_ssd_reg_280` `0x4460` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8960_8991` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8960_8991` `RO 0xFFFFFFFF`
`smmu_ssd_reg_281` `0x4464` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_8992_9023` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_8992_9023` `RO 0xFFFFFFFF`
`smmu_ssd_reg_282` `0x4468` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9024_9055` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9024_9055` `RO 0xFFFFFFFF`
`smmu_ssd_reg_283` `0x446C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9056_9087` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9056_9087` `RO 0xFFFFFFFF`
`smmu_ssd_reg_284` `0x4470` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9088_9119` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9088_9119` `RO 0xFFFFFFFF`
`smmu_ssd_reg_285` `0x4474` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9120_9151` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9120_9151` `RO 0xFFFFFFFF`
`smmu_ssd_reg_286` `0x4478` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9152_9183` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9152_9183` `RO 0xFFFFFFFF`
`smmu_ssd_reg_287` `0x447C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9184_9215` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9184_9215` `RO 0xFFFFFFFF`
`smmu_ssd_reg_288` `0x4480` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9216_9247` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9216_9247` `RO 0xFFFFFFFF`
`smmu_ssd_reg_289` `0x4484` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9248_9279` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9248_9279` `RO 0xFFFFFFFF`
`smmu_ssd_reg_290` `0x4488` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9280_9311` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9280_9311` `RO 0xFFFFFFFF`
`smmu_ssd_reg_291` `0x448C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9312_9343` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9312_9343` `RO 0xFFFFFFFF`
`smmu_ssd_reg_292` `0x4490` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9344_9375` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9344_9375` `RO 0xFFFFFFFF`
`smmu_ssd_reg_293` `0x4494` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9376_9407` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9376_9407` `RO 0xFFFFFFFF`
`smmu_ssd_reg_294` `0x4498` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9408_9439` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9408_9439` `RO 0xFFFFFFFF`
`smmu_ssd_reg_295` `0x449C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9440_9471` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9440_9471` `RO 0xFFFFFFFF`
`smmu_ssd_reg_296` `0x44A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9472_9503` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9472_9503` `RO 0xFFFFFFFF`
`smmu_ssd_reg_297` `0x44A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9504_9535` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9504_9535` `RO 0xFFFFFFFF`
`smmu_ssd_reg_298` `0x44A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9536_9567` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9536_9567` `RO 0xFFFFFFFF`
`smmu_ssd_reg_299` `0x44AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9568_9599` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9568_9599` `RO 0xFFFFFFFF`
`smmu_ssd_reg_300` `0x44B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9600_9631` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9600_9631` `RO 0xFFFFFFFF`
`smmu_ssd_reg_301` `0x44B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9632_9663` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9632_9663` `RO 0xFFFFFFFF`
`smmu_ssd_reg_302` `0x44B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9664_9695` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9664_9695` `RO 0xFFFFFFFF`
`smmu_ssd_reg_303` `0x44BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9696_9727` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9696_9727` `RO 0xFFFFFFFF`
`smmu_ssd_reg_304` `0x44C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9728_9759` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9728_9759` `RO 0xFFFFFFFF`
`smmu_ssd_reg_305` `0x44C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9760_9791` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9760_9791` `RO 0xFFFFFFFF`
`smmu_ssd_reg_306` `0x44C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9792_9823` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9792_9823` `RO 0xFFFFFFFF`
`smmu_ssd_reg_307` `0x44CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9824_9855` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9824_9855` `RO 0xFFFFFFFF`
`smmu_ssd_reg_308` `0x44D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9856_9887` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9856_9887` `RO 0xFFFFFFFF`
`smmu_ssd_reg_309` `0x44D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9888_9919` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9888_9919` `RO 0xFFFFFFFF`
`smmu_ssd_reg_310` `0x44D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9920_9951` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9920_9951` `RO 0xFFFFFFFF`
`smmu_ssd_reg_311` `0x44DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9952_9983` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9952_9983` `RO 0xFFFFFFFF`
`smmu_ssd_reg_312` `0x44E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_9984_10015` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_9984_10015` `RO 0xFFFFFFFF`
`smmu_ssd_reg_313` `0x44E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10016_10047` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10016_10047` `RO 0xFFFFFFFF`
`smmu_ssd_reg_314` `0x44E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10048_10079` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10048_10079` `RO 0xFFFFFFFF`
`smmu_ssd_reg_315` `0x44EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10080_10111` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10080_10111` `RO 0xFFFFFFFF`
`smmu_ssd_reg_316` `0x44F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10112_10143` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10112_10143` `RO 0xFFFFFFFF`
`smmu_ssd_reg_317` `0x44F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10144_10175` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10144_10175` `RO 0xFFFFFFFF`
`smmu_ssd_reg_318` `0x44F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10176_10207` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10176_10207` `RO 0xFFFFFFFF`
`smmu_ssd_reg_319` `0x44FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10208_10239` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10208_10239` `RO 0xFFFFFFFF`
`smmu_ssd_reg_320` `0x4500` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10240_10271` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10240_10271` `RO 0xFFFFFFFF`
`smmu_ssd_reg_321` `0x4504` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10272_10303` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10272_10303` `RO 0xFFFFFFFF`
`smmu_ssd_reg_322` `0x4508` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10304_10335` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10304_10335` `RO 0xFFFFFFFF`
`smmu_ssd_reg_323` `0x450C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10336_10367` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10336_10367` `RO 0xFFFFFFFF`
`smmu_ssd_reg_324` `0x4510` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10368_10399` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10368_10399` `RO 0xFFFFFFFF`
`smmu_ssd_reg_325` `0x4514` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10400_10431` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10400_10431` `RO 0xFFFFFFFF`
`smmu_ssd_reg_326` `0x4518` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10432_10463` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10432_10463` `RO 0xFFFFFFFF`
`smmu_ssd_reg_327` `0x451C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10464_10495` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10464_10495` `RO 0xFFFFFFFF`
`smmu_ssd_reg_328` `0x4520` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10496_10527` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10496_10527` `RO 0xFFFFFFFF`
`smmu_ssd_reg_329` `0x4524` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10528_10559` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10528_10559` `RO 0xFFFFFFFF`
`smmu_ssd_reg_330` `0x4528` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10560_10591` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10560_10591` `RO 0xFFFFFFFF`
`smmu_ssd_reg_331` `0x452C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10592_10623` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10592_10623` `RO 0xFFFFFFFF`
`smmu_ssd_reg_332` `0x4530` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10624_10655` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10624_10655` `RO 0xFFFFFFFF`
`smmu_ssd_reg_333` `0x4534` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10656_10687` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10656_10687` `RO 0xFFFFFFFF`
`smmu_ssd_reg_334` `0x4538` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10688_10719` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10688_10719` `RO 0xFFFFFFFF`
`smmu_ssd_reg_335` `0x453C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10720_10751` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10720_10751` `RO 0xFFFFFFFF`
`smmu_ssd_reg_336` `0x4540` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10752_10783` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10752_10783` `RO 0xFFFFFFFF`
`smmu_ssd_reg_337` `0x4544` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10784_10815` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10784_10815` `RO 0xFFFFFFFF`
`smmu_ssd_reg_338` `0x4548` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10816_10847` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10816_10847` `RO 0xFFFFFFFF`
`smmu_ssd_reg_339` `0x454C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10848_10879` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10848_10879` `RO 0xFFFFFFFF`
`smmu_ssd_reg_340` `0x4550` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10880_10911` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10880_10911` `RO 0xFFFFFFFF`
`smmu_ssd_reg_341` `0x4554` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10912_10943` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10912_10943` `RO 0xFFFFFFFF`
`smmu_ssd_reg_342` `0x4558` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10944_10975` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10944_10975` `RO 0xFFFFFFFF`
`smmu_ssd_reg_343` `0x455C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_10976_11007` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_10976_11007` `RO 0xFFFFFFFF`
`smmu_ssd_reg_344` `0x4560` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11008_11039` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11008_11039` `RO 0xFFFFFFFF`
`smmu_ssd_reg_345` `0x4564` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11040_11071` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11040_11071` `RO 0xFFFFFFFF`
`smmu_ssd_reg_346` `0x4568` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11072_11103` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11072_11103` `RO 0xFFFFFFFF`
`smmu_ssd_reg_347` `0x456C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11104_11135` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11104_11135` `RO 0xFFFFFFFF`
`smmu_ssd_reg_348` `0x4570` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11136_11167` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11136_11167` `RO 0xFFFFFFFF`
`smmu_ssd_reg_349` `0x4574` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11168_11199` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11168_11199` `RO 0xFFFFFFFF`
`smmu_ssd_reg_350` `0x4578` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11200_11231` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11200_11231` `RO 0xFFFFFFFF`
`smmu_ssd_reg_351` `0x457C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11232_11263` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11232_11263` `RO 0xFFFFFFFF`
`smmu_ssd_reg_352` `0x4580` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11264_11295` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11264_11295` `RO 0xFFFFFFFF`
`smmu_ssd_reg_353` `0x4584` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11296_11327` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11296_11327` `RO 0xFFFFFFFF`
`smmu_ssd_reg_354` `0x4588` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11328_11359` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11328_11359` `RO 0xFFFFFFFF`
`smmu_ssd_reg_355` `0x458C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11360_11391` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11360_11391` `RO 0xFFFFFFFF`
`smmu_ssd_reg_356` `0x4590` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11392_11423` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11392_11423` `RO 0xFFFFFFFF`
`smmu_ssd_reg_357` `0x4594` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11424_11455` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11424_11455` `RO 0xFFFFFFFF`
`smmu_ssd_reg_358` `0x4598` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11456_11487` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11456_11487` `RO 0xFFFFFFFF`
`smmu_ssd_reg_359` `0x459C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11488_11519` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11488_11519` `RO 0xFFFFFFFF`
`smmu_ssd_reg_360` `0x45A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11520_11551` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11520_11551` `RO 0xFFFFFFFF`
`smmu_ssd_reg_361` `0x45A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11552_11583` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11552_11583` `RO 0xFFFFFFFF`
`smmu_ssd_reg_362` `0x45A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11584_11615` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11584_11615` `RO 0xFFFFFFFF`
`smmu_ssd_reg_363` `0x45AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11616_11647` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11616_11647` `RO 0xFFFFFFFF`
`smmu_ssd_reg_364` `0x45B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11648_11679` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11648_11679` `RO 0xFFFFFFFF`
`smmu_ssd_reg_365` `0x45B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11680_11711` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11680_11711` `RO 0xFFFFFFFF`
`smmu_ssd_reg_366` `0x45B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11712_11743` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11712_11743` `RO 0xFFFFFFFF`
`smmu_ssd_reg_367` `0x45BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11744_11775` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11744_11775` `RO 0xFFFFFFFF`
`smmu_ssd_reg_368` `0x45C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11776_11807` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11776_11807` `RO 0xFFFFFFFF`
`smmu_ssd_reg_369` `0x45C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11808_11839` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11808_11839` `RO 0xFFFFFFFF`
`smmu_ssd_reg_370` `0x45C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11840_11871` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11840_11871` `RO 0xFFFFFFFF`
`smmu_ssd_reg_371` `0x45CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11872_11903` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11872_11903` `RO 0xFFFFFFFF`
`smmu_ssd_reg_372` `0x45D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11904_11935` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11904_11935` `RO 0xFFFFFFFF`
`smmu_ssd_reg_373` `0x45D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11936_11967` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11936_11967` `RO 0xFFFFFFFF`
`smmu_ssd_reg_374` `0x45D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_11968_11999` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_11968_11999` `RO 0xFFFFFFFF`
`smmu_ssd_reg_375` `0x45DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12000_12031` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12000_12031` `RO 0xFFFFFFFF`
`smmu_ssd_reg_376` `0x45E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12032_12063` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12032_12063` `RO 0xFFFFFFFF`
`smmu_ssd_reg_377` `0x45E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12064_12095` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12064_12095` `RO 0xFFFFFFFF`
`smmu_ssd_reg_378` `0x45E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12096_12127` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12096_12127` `RO 0xFFFFFFFF`
`smmu_ssd_reg_379` `0x45EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12128_12159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12128_12159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_380` `0x45F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12160_12191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12160_12191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_381` `0x45F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12192_12223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12192_12223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_382` `0x45F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12224_12255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12224_12255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_383` `0x45FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12256_12287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12256_12287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_384` `0x4600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12288_12319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12288_12319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_385` `0x4604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12320_12351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12320_12351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_386` `0x4608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12352_12383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12352_12383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_387` `0x460C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12384_12415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12384_12415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_388` `0x4610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12416_12447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12416_12447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_389` `0x4614` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12448_12479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12448_12479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_390` `0x4618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12480_12511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12480_12511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_391` `0x461C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12512_12543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12512_12543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_392` `0x4620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12544_12575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12544_12575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_393` `0x4624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12576_12607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12576_12607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_394` `0x4628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12608_12639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12608_12639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_395` `0x462C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12640_12671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12640_12671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_396` `0x4630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12672_12703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12672_12703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_397` `0x4634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12704_12735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12704_12735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_398` `0x4638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12736_12767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12736_12767` `RO 0xFFFFFFFF`
`smmu_ssd_reg_399` `0x463C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12768_12799` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12768_12799` `RO 0xFFFFFFFF`
`smmu_ssd_reg_400` `0x4640` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12800_12831` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12800_12831` `RO 0xFFFFFFFF`
`smmu_ssd_reg_401` `0x4644` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12832_12863` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12832_12863` `RO 0xFFFFFFFF`
`smmu_ssd_reg_402` `0x4648` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12864_12895` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12864_12895` `RO 0xFFFFFFFF`
`smmu_ssd_reg_403` `0x464C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12896_12927` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12896_12927` `RO 0xFFFFFFFF`
`smmu_ssd_reg_404` `0x4650` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12928_12959` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12928_12959` `RO 0xFFFFFFFF`
`smmu_ssd_reg_405` `0x4654` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12960_12991` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12960_12991` `RO 0xFFFFFFFF`
`smmu_ssd_reg_406` `0x4658` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_12992_13023` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_12992_13023` `RO 0xFFFFFFFF`
`smmu_ssd_reg_407` `0x465C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13024_13055` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13024_13055` `RO 0xFFFFFFFF`
`smmu_ssd_reg_408` `0x4660` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13056_13087` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13056_13087` `RO 0xFFFFFFFF`
`smmu_ssd_reg_409` `0x4664` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13088_13119` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13088_13119` `RO 0xFFFFFFFF`
`smmu_ssd_reg_410` `0x4668` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13120_13151` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13120_13151` `RO 0xFFFFFFFF`
`smmu_ssd_reg_411` `0x466C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13152_13183` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13152_13183` `RO 0xFFFFFFFF`
`smmu_ssd_reg_412` `0x4670` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13184_13215` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13184_13215` `RO 0xFFFFFFFF`
`smmu_ssd_reg_413` `0x4674` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13216_13247` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13216_13247` `RO 0xFFFFFFFF`
`smmu_ssd_reg_414` `0x4678` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13248_13279` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13248_13279` `RO 0xFFFFFFFF`
`smmu_ssd_reg_415` `0x467C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13280_13311` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13280_13311` `RO 0xFFFFFFFF`
`smmu_ssd_reg_416` `0x4680` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13312_13343` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13312_13343` `RO 0xFFFFFFFF`
`smmu_ssd_reg_417` `0x4684` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13344_13375` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13344_13375` `RO 0xFFFFFFFF`
`smmu_ssd_reg_418` `0x4688` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13376_13407` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13376_13407` `RO 0xFFFFFFFF`
`smmu_ssd_reg_419` `0x468C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13408_13439` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13408_13439` `RO 0xFFFFFFFF`
`smmu_ssd_reg_420` `0x4690` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13440_13471` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13440_13471` `RO 0xFFFFFFFF`
`smmu_ssd_reg_421` `0x4694` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13472_13503` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13472_13503` `RO 0xFFFFFFFF`
`smmu_ssd_reg_422` `0x4698` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13504_13535` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13504_13535` `RO 0xFFFFFFFF`
`smmu_ssd_reg_423` `0x469C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13536_13567` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13536_13567` `RO 0xFFFFFFFF`
`smmu_ssd_reg_424` `0x46A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13568_13599` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13568_13599` `RO 0xFFFFFFFF`
`smmu_ssd_reg_425` `0x46A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13600_13631` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13600_13631` `RO 0xFFFFFFFF`
`smmu_ssd_reg_426` `0x46A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13632_13663` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13632_13663` `RO 0xFFFFFFFF`
`smmu_ssd_reg_427` `0x46AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13664_13695` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13664_13695` `RO 0xFFFFFFFF`
`smmu_ssd_reg_428` `0x46B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13696_13727` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13696_13727` `RO 0xFFFFFFFF`
`smmu_ssd_reg_429` `0x46B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13728_13759` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13728_13759` `RO 0xFFFFFFFF`
`smmu_ssd_reg_430` `0x46B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13760_13791` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13760_13791` `RO 0xFFFFFFFF`
`smmu_ssd_reg_431` `0x46BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13792_13823` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13792_13823` `RO 0xFFFFFFFF`
`smmu_ssd_reg_432` `0x46C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13824_13855` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13824_13855` `RO 0xFFFFFFFF`
`smmu_ssd_reg_433` `0x46C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13856_13887` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13856_13887` `RO 0xFFFFFFFF`
`smmu_ssd_reg_434` `0x46C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13888_13919` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13888_13919` `RO 0xFFFFFFFF`
`smmu_ssd_reg_435` `0x46CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13920_13951` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13920_13951` `RO 0xFFFFFFFF`
`smmu_ssd_reg_436` `0x46D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13952_13983` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13952_13983` `RO 0xFFFFFFFF`
`smmu_ssd_reg_437` `0x46D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_13984_14015` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_13984_14015` `RO 0xFFFFFFFF`
`smmu_ssd_reg_438` `0x46D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14016_14047` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14016_14047` `RO 0xFFFFFFFF`
`smmu_ssd_reg_439` `0x46DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14048_14079` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14048_14079` `RO 0xFFFFFFFF`
`smmu_ssd_reg_440` `0x46E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14080_14111` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14080_14111` `RO 0xFFFFFFFF`
`smmu_ssd_reg_441` `0x46E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14112_14143` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14112_14143` `RO 0xFFFFFFFF`
`smmu_ssd_reg_442` `0x46E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14144_14175` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14144_14175` `RO 0xFFFFFFFF`
`smmu_ssd_reg_443` `0x46EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14176_14207` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14176_14207` `RO 0xFFFFFFFF`
`smmu_ssd_reg_444` `0x46F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14208_14239` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14208_14239` `RO 0xFFFFFFFF`
`smmu_ssd_reg_445` `0x46F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14240_14271` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14240_14271` `RO 0xFFFFFFFF`
`smmu_ssd_reg_446` `0x46F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14272_14303` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14272_14303` `RO 0xFFFFFFFF`
`smmu_ssd_reg_447` `0x46FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14304_14335` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14304_14335` `RO 0xFFFFFFFF`
`smmu_ssd_reg_448` `0x4700` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14336_14367` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14336_14367` `RO 0xFFFFFFFF`
`smmu_ssd_reg_449` `0x4704` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14368_14399` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14368_14399` `RO 0xFFFFFFFF`
`smmu_ssd_reg_450` `0x4708` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14400_14431` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14400_14431` `RO 0xFFFFFFFF`
`smmu_ssd_reg_451` `0x470C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14432_14463` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14432_14463` `RO 0xFFFFFFFF`
`smmu_ssd_reg_452` `0x4710` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14464_14495` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14464_14495` `RO 0xFFFFFFFF`
`smmu_ssd_reg_453` `0x4714` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14496_14527` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14496_14527` `RO 0xFFFFFFFF`
`smmu_ssd_reg_454` `0x4718` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14528_14559` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14528_14559` `RO 0xFFFFFFFF`
`smmu_ssd_reg_455` `0x471C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14560_14591` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14560_14591` `RO 0xFFFFFFFF`
`smmu_ssd_reg_456` `0x4720` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14592_14623` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14592_14623` `RO 0xFFFFFFFF`
`smmu_ssd_reg_457` `0x4724` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14624_14655` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14624_14655` `RO 0xFFFFFFFF`
`smmu_ssd_reg_458` `0x4728` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14656_14687` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14656_14687` `RO 0xFFFFFFFF`
`smmu_ssd_reg_459` `0x472C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14688_14719` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14688_14719` `RO 0xFFFFFFFF`
`smmu_ssd_reg_460` `0x4730` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14720_14751` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14720_14751` `RO 0xFFFFFFFF`
`smmu_ssd_reg_461` `0x4734` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14752_14783` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14752_14783` `RO 0xFFFFFFFF`
`smmu_ssd_reg_462` `0x4738` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14784_14815` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14784_14815` `RO 0xFFFFFFFF`
`smmu_ssd_reg_463` `0x473C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14816_14847` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14816_14847` `RO 0xFFFFFFFF`
`smmu_ssd_reg_464` `0x4740` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14848_14879` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14848_14879` `RO 0xFFFFFFFF`
`smmu_ssd_reg_465` `0x4744` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14880_14911` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14880_14911` `RO 0xFFFFFFFF`
`smmu_ssd_reg_466` `0x4748` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14912_14943` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14912_14943` `RO 0xFFFFFFFF`
`smmu_ssd_reg_467` `0x474C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14944_14975` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14944_14975` `RO 0xFFFFFFFF`
`smmu_ssd_reg_468` `0x4750` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_14976_15007` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_14976_15007` `RO 0xFFFFFFFF`
`smmu_ssd_reg_469` `0x4754` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15008_15039` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15008_15039` `RO 0xFFFFFFFF`
`smmu_ssd_reg_470` `0x4758` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15040_15071` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15040_15071` `RO 0xFFFFFFFF`
`smmu_ssd_reg_471` `0x475C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15072_15103` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15072_15103` `RO 0xFFFFFFFF`
`smmu_ssd_reg_472` `0x4760` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15104_15135` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15104_15135` `RO 0xFFFFFFFF`
`smmu_ssd_reg_473` `0x4764` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15136_15167` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15136_15167` `RO 0xFFFFFFFF`
`smmu_ssd_reg_474` `0x4768` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15168_15199` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15168_15199` `RO 0xFFFFFFFF`
`smmu_ssd_reg_475` `0x476C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15200_15231` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15200_15231` `RO 0xFFFFFFFF`
`smmu_ssd_reg_476` `0x4770` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15232_15263` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15232_15263` `RO 0xFFFFFFFF`
`smmu_ssd_reg_477` `0x4774` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15264_15295` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15264_15295` `RO 0xFFFFFFFF`
`smmu_ssd_reg_478` `0x4778` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15296_15327` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15296_15327` `RO 0xFFFFFFFF`
`smmu_ssd_reg_479` `0x477C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15328_15359` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15328_15359` `RO 0xFFFFFFFF`
`smmu_ssd_reg_480` `0x4780` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15360_15391` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15360_15391` `RO 0xFFFFFFFF`
`smmu_ssd_reg_481` `0x4784` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15392_15423` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15392_15423` `RO 0xFFFFFFFF`
`smmu_ssd_reg_482` `0x4788` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15424_15455` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15424_15455` `RO 0xFFFFFFFF`
`smmu_ssd_reg_483` `0x478C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15456_15487` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15456_15487` `RO 0xFFFFFFFF`
`smmu_ssd_reg_484` `0x4790` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15488_15519` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15488_15519` `RO 0xFFFFFFFF`
`smmu_ssd_reg_485` `0x4794` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15520_15551` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15520_15551` `RO 0xFFFFFFFF`
`smmu_ssd_reg_486` `0x4798` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15552_15583` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15552_15583` `RO 0xFFFFFFFF`
`smmu_ssd_reg_487` `0x479C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15584_15615` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15584_15615` `RO 0xFFFFFFFF`
`smmu_ssd_reg_488` `0x47A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15616_15647` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15616_15647` `RO 0xFFFFFFFF`
`smmu_ssd_reg_489` `0x47A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15648_15679` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15648_15679` `RO 0xFFFFFFFF`
`smmu_ssd_reg_490` `0x47A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15680_15711` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15680_15711` `RO 0xFFFFFFFF`
`smmu_ssd_reg_491` `0x47AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15712_15743` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15712_15743` `RO 0xFFFFFFFF`
`smmu_ssd_reg_492` `0x47B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15744_15775` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15744_15775` `RO 0xFFFFFFFF`
`smmu_ssd_reg_493` `0x47B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15776_15807` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15776_15807` `RO 0xFFFFFFFF`
`smmu_ssd_reg_494` `0x47B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15808_15839` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15808_15839` `RO 0xFFFFFFFF`
`smmu_ssd_reg_495` `0x47BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15840_15871` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15840_15871` `RO 0xFFFFFFFF`
`smmu_ssd_reg_496` `0x47C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15872_15903` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15872_15903` `RO 0xFFFFFFFF`
`smmu_ssd_reg_497` `0x47C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15904_15935` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15904_15935` `RO 0xFFFFFFFF`
`smmu_ssd_reg_498` `0x47C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15936_15967` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15936_15967` `RO 0xFFFFFFFF`
`smmu_ssd_reg_499` `0x47CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_15968_15999` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_15968_15999` `RO 0xFFFFFFFF`
`smmu_ssd_reg_500` `0x47D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16000_16031` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16000_16031` `RO 0xFFFFFFFF`
`smmu_ssd_reg_501` `0x47D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16032_16063` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16032_16063` `RO 0xFFFFFFFF`
`smmu_ssd_reg_502` `0x47D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16064_16095` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16064_16095` `RO 0xFFFFFFFF`
`smmu_ssd_reg_503` `0x47DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16096_16127` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16096_16127` `RO 0xFFFFFFFF`
`smmu_ssd_reg_504` `0x47E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16128_16159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16128_16159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_505` `0x47E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16160_16191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16160_16191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_506` `0x47E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16192_16223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16192_16223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_507` `0x47EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16224_16255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16224_16255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_508` `0x47F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16256_16287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16256_16287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_509` `0x47F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16288_16319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16288_16319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_510` `0x47F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16320_16351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16320_16351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_511` `0x47FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16352_16383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16352_16383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_512` `0x4800` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16384_16415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16384_16415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_513` `0x4804` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16416_16447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16416_16447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_514` `0x4808` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16448_16479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16448_16479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_515` `0x480C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16480_16511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16480_16511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_516` `0x4810` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16512_16543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16512_16543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_517` `0x4814` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16544_16575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16544_16575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_518` `0x4818` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16576_16607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16576_16607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_519` `0x481C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16608_16639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16608_16639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_520` `0x4820` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16640_16671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16640_16671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_521` `0x4824` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16672_16703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16672_16703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_522` `0x4828` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16704_16735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16704_16735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_523` `0x482C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16736_16767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16736_16767` `RO 0xFFFFFFFF`
`smmu_ssd_reg_524` `0x4830` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16768_16799` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16768_16799` `RO 0xFFFFFFFF`
`smmu_ssd_reg_525` `0x4834` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16800_16831` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16800_16831` `RO 0xFFFFFFFF`
`smmu_ssd_reg_526` `0x4838` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16832_16863` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16832_16863` `RO 0xFFFFFFFF`
`smmu_ssd_reg_527` `0x483C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16864_16895` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16864_16895` `RO 0xFFFFFFFF`
`smmu_ssd_reg_528` `0x4840` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16896_16927` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16896_16927` `RO 0xFFFFFFFF`
`smmu_ssd_reg_529` `0x4844` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16928_16959` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16928_16959` `RO 0xFFFFFFFF`
`smmu_ssd_reg_530` `0x4848` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16960_16991` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16960_16991` `RO 0xFFFFFFFF`
`smmu_ssd_reg_531` `0x484C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_16992_17023` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_16992_17023` `RO 0xFFFFFFFF`
`smmu_ssd_reg_532` `0x4850` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17024_17055` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17024_17055` `RO 0xFFFFFFFF`
`smmu_ssd_reg_533` `0x4854` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17056_17087` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17056_17087` `RO 0xFFFFFFFF`
`smmu_ssd_reg_534` `0x4858` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17088_17119` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17088_17119` `RO 0xFFFFFFFF`
`smmu_ssd_reg_535` `0x485C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17120_17151` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17120_17151` `RO 0xFFFFFFFF`
`smmu_ssd_reg_536` `0x4860` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17152_17183` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17152_17183` `RO 0xFFFFFFFF`
`smmu_ssd_reg_537` `0x4864` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17184_17215` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17184_17215` `RO 0xFFFFFFFF`
`smmu_ssd_reg_538` `0x4868` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17216_17247` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17216_17247` `RO 0xFFFFFFFF`
`smmu_ssd_reg_539` `0x486C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17248_17279` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17248_17279` `RO 0xFFFFFFFF`
`smmu_ssd_reg_540` `0x4870` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17280_17311` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17280_17311` `RO 0xFFFFFFFF`
`smmu_ssd_reg_541` `0x4874` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17312_17343` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17312_17343` `RO 0xFFFFFFFF`
`smmu_ssd_reg_542` `0x4878` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17344_17375` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17344_17375` `RO 0xFFFFFFFF`
`smmu_ssd_reg_543` `0x487C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17376_17407` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17376_17407` `RO 0xFFFFFFFF`
`smmu_ssd_reg_544` `0x4880` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17408_17439` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17408_17439` `RO 0xFFFFFFFF`
`smmu_ssd_reg_545` `0x4884` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17440_17471` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17440_17471` `RO 0xFFFFFFFF`
`smmu_ssd_reg_546` `0x4888` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17472_17503` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17472_17503` `RO 0xFFFFFFFF`
`smmu_ssd_reg_547` `0x488C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17504_17535` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17504_17535` `RO 0xFFFFFFFF`
`smmu_ssd_reg_548` `0x4890` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17536_17567` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17536_17567` `RO 0xFFFFFFFF`
`smmu_ssd_reg_549` `0x4894` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17568_17599` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17568_17599` `RO 0xFFFFFFFF`
`smmu_ssd_reg_550` `0x4898` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17600_17631` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17600_17631` `RO 0xFFFFFFFF`
`smmu_ssd_reg_551` `0x489C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17632_17663` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17632_17663` `RO 0xFFFFFFFF`
`smmu_ssd_reg_552` `0x48A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17664_17695` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17664_17695` `RO 0xFFFFFFFF`
`smmu_ssd_reg_553` `0x48A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17696_17727` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17696_17727` `RO 0xFFFFFFFF`
`smmu_ssd_reg_554` `0x48A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17728_17759` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17728_17759` `RO 0xFFFFFFFF`
`smmu_ssd_reg_555` `0x48AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17760_17791` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17760_17791` `RO 0xFFFFFFFF`
`smmu_ssd_reg_556` `0x48B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17792_17823` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17792_17823` `RO 0xFFFFFFFF`
`smmu_ssd_reg_557` `0x48B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17824_17855` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17824_17855` `RO 0xFFFFFFFF`
`smmu_ssd_reg_558` `0x48B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17856_17887` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17856_17887` `RO 0xFFFFFFFF`
`smmu_ssd_reg_559` `0x48BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17888_17919` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17888_17919` `RO 0xFFFFFFFF`
`smmu_ssd_reg_560` `0x48C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17920_17951` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17920_17951` `RO 0xFFFFFFFF`
`smmu_ssd_reg_561` `0x48C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17952_17983` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17952_17983` `RO 0xFFFFFFFF`
`smmu_ssd_reg_562` `0x48C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_17984_18015` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_17984_18015` `RO 0xFFFFFFFF`
`smmu_ssd_reg_563` `0x48CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18016_18047` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18016_18047` `RO 0xFFFFFFFF`
`smmu_ssd_reg_564` `0x48D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18048_18079` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18048_18079` `RO 0xFFFFFFFF`
`smmu_ssd_reg_565` `0x48D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18080_18111` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18080_18111` `RO 0xFFFFFFFF`
`smmu_ssd_reg_566` `0x48D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18112_18143` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18112_18143` `RO 0xFFFFFFFF`
`smmu_ssd_reg_567` `0x48DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18144_18175` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18144_18175` `RO 0xFFFFFFFF`
`smmu_ssd_reg_568` `0x48E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18176_18207` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18176_18207` `RO 0xFFFFFFFF`
`smmu_ssd_reg_569` `0x48E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18208_18239` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18208_18239` `RO 0xFFFFFFFF`
`smmu_ssd_reg_570` `0x48E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18240_18271` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18240_18271` `RO 0xFFFFFFFF`
`smmu_ssd_reg_571` `0x48EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18272_18303` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18272_18303` `RO 0xFFFFFFFF`
`smmu_ssd_reg_572` `0x48F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18304_18335` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18304_18335` `RO 0xFFFFFFFF`
`smmu_ssd_reg_573` `0x48F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18336_18367` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18336_18367` `RO 0xFFFFFFFF`
`smmu_ssd_reg_574` `0x48F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18368_18399` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18368_18399` `RO 0xFFFFFFFF`
`smmu_ssd_reg_575` `0x48FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18400_18431` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18400_18431` `RO 0xFFFFFFFF`
`smmu_ssd_reg_576` `0x4900` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18432_18463` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18432_18463` `RO 0xFFFFFFFF`
`smmu_ssd_reg_577` `0x4904` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18464_18495` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18464_18495` `RO 0xFFFFFFFF`
`smmu_ssd_reg_578` `0x4908` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18496_18527` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18496_18527` `RO 0xFFFFFFFF`
`smmu_ssd_reg_579` `0x490C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18528_18559` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18528_18559` `RO 0xFFFFFFFF`
`smmu_ssd_reg_580` `0x4910` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18560_18591` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18560_18591` `RO 0xFFFFFFFF`
`smmu_ssd_reg_581` `0x4914` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18592_18623` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18592_18623` `RO 0xFFFFFFFF`
`smmu_ssd_reg_582` `0x4918` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18624_18655` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18624_18655` `RO 0xFFFFFFFF`
`smmu_ssd_reg_583` `0x491C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18656_18687` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18656_18687` `RO 0xFFFFFFFF`
`smmu_ssd_reg_584` `0x4920` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18688_18719` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18688_18719` `RO 0xFFFFFFFF`
`smmu_ssd_reg_585` `0x4924` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18720_18751` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18720_18751` `RO 0xFFFFFFFF`
`smmu_ssd_reg_586` `0x4928` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18752_18783` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18752_18783` `RO 0xFFFFFFFF`
`smmu_ssd_reg_587` `0x492C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18784_18815` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18784_18815` `RO 0xFFFFFFFF`
`smmu_ssd_reg_588` `0x4930` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18816_18847` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18816_18847` `RO 0xFFFFFFFF`
`smmu_ssd_reg_589` `0x4934` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18848_18879` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18848_18879` `RO 0xFFFFFFFF`
`smmu_ssd_reg_590` `0x4938` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18880_18911` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18880_18911` `RO 0xFFFFFFFF`
`smmu_ssd_reg_591` `0x493C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18912_18943` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18912_18943` `RO 0xFFFFFFFF`
`smmu_ssd_reg_592` `0x4940` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18944_18975` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18944_18975` `RO 0xFFFFFFFF`
`smmu_ssd_reg_593` `0x4944` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_18976_19007` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_18976_19007` `RO 0xFFFFFFFF`
`smmu_ssd_reg_594` `0x4948` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19008_19039` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19008_19039` `RO 0xFFFFFFFF`
`smmu_ssd_reg_595` `0x494C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19040_19071` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19040_19071` `RO 0xFFFFFFFF`
`smmu_ssd_reg_596` `0x4950` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19072_19103` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19072_19103` `RO 0xFFFFFFFF`
`smmu_ssd_reg_597` `0x4954` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19104_19135` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19104_19135` `RO 0xFFFFFFFF`
`smmu_ssd_reg_598` `0x4958` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19136_19167` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19136_19167` `RO 0xFFFFFFFF`
`smmu_ssd_reg_599` `0x495C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19168_19199` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19168_19199` `RO 0xFFFFFFFF`
`smmu_ssd_reg_600` `0x4960` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19200_19231` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19200_19231` `RO 0xFFFFFFFF`
`smmu_ssd_reg_601` `0x4964` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19232_19263` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19232_19263` `RO 0xFFFFFFFF`
`smmu_ssd_reg_602` `0x4968` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19264_19295` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19264_19295` `RO 0xFFFFFFFF`
`smmu_ssd_reg_603` `0x496C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19296_19327` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19296_19327` `RO 0xFFFFFFFF`
`smmu_ssd_reg_604` `0x4970` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19328_19359` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19328_19359` `RO 0xFFFFFFFF`
`smmu_ssd_reg_605` `0x4974` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19360_19391` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19360_19391` `RO 0xFFFFFFFF`
`smmu_ssd_reg_606` `0x4978` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19392_19423` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19392_19423` `RO 0xFFFFFFFF`
`smmu_ssd_reg_607` `0x497C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19424_19455` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19424_19455` `RO 0xFFFFFFFF`
`smmu_ssd_reg_608` `0x4980` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19456_19487` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19456_19487` `RO 0xFFFFFFFF`
`smmu_ssd_reg_609` `0x4984` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19488_19519` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19488_19519` `RO 0xFFFFFFFF`
`smmu_ssd_reg_610` `0x4988` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19520_19551` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19520_19551` `RO 0xFFFFFFFF`
`smmu_ssd_reg_611` `0x498C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19552_19583` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19552_19583` `RO 0xFFFFFFFF`
`smmu_ssd_reg_612` `0x4990` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19584_19615` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19584_19615` `RO 0xFFFFFFFF`
`smmu_ssd_reg_613` `0x4994` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19616_19647` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19616_19647` `RO 0xFFFFFFFF`
`smmu_ssd_reg_614` `0x4998` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19648_19679` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19648_19679` `RO 0xFFFFFFFF`
`smmu_ssd_reg_615` `0x499C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19680_19711` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19680_19711` `RO 0xFFFFFFFF`
`smmu_ssd_reg_616` `0x49A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19712_19743` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19712_19743` `RO 0xFFFFFFFF`
`smmu_ssd_reg_617` `0x49A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19744_19775` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19744_19775` `RO 0xFFFFFFFF`
`smmu_ssd_reg_618` `0x49A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19776_19807` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19776_19807` `RO 0xFFFFFFFF`
`smmu_ssd_reg_619` `0x49AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19808_19839` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19808_19839` `RO 0xFFFFFFFF`
`smmu_ssd_reg_620` `0x49B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19840_19871` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19840_19871` `RO 0xFFFFFFFF`
`smmu_ssd_reg_621` `0x49B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19872_19903` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19872_19903` `RO 0xFFFFFFFF`
`smmu_ssd_reg_622` `0x49B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19904_19935` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19904_19935` `RO 0xFFFFFFFF`
`smmu_ssd_reg_623` `0x49BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19936_19967` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19936_19967` `RO 0xFFFFFFFF`
`smmu_ssd_reg_624` `0x49C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_19968_19999` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_19968_19999` `RO 0xFFFFFFFF`
`smmu_ssd_reg_625` `0x49C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20000_20031` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20000_20031` `RO 0xFFFFFFFF`
`smmu_ssd_reg_626` `0x49C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20032_20063` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20032_20063` `RO 0xFFFFFFFF`
`smmu_ssd_reg_627` `0x49CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20064_20095` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20064_20095` `RO 0xFFFFFFFF`
`smmu_ssd_reg_628` `0x49D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20096_20127` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20096_20127` `RO 0xFFFFFFFF`
`smmu_ssd_reg_629` `0x49D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20128_20159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20128_20159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_630` `0x49D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20160_20191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20160_20191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_631` `0x49DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20192_20223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20192_20223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_632` `0x49E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20224_20255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20224_20255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_633` `0x49E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20256_20287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20256_20287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_634` `0x49E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20288_20319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20288_20319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_635` `0x49EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20320_20351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20320_20351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_636` `0x49F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20352_20383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20352_20383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_637` `0x49F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20384_20415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20384_20415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_638` `0x49F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20416_20447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20416_20447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_639` `0x49FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20448_20479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20448_20479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_640` `0x4A00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20480_20511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20480_20511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_641` `0x4A04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20512_20543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20512_20543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_642` `0x4A08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20544_20575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20544_20575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_643` `0x4A0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20576_20607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20576_20607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_644` `0x4A10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20608_20639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20608_20639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_645` `0x4A14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20640_20671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20640_20671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_646` `0x4A18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20672_20703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20672_20703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_647` `0x4A1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20704_20735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20704_20735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_648` `0x4A20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20736_20767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20736_20767` `RO 0xFFFFFFFF`
`smmu_ssd_reg_649` `0x4A24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20768_20799` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20768_20799` `RO 0xFFFFFFFF`
`smmu_ssd_reg_650` `0x4A28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20800_20831` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20800_20831` `RO 0xFFFFFFFF`
`smmu_ssd_reg_651` `0x4A2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20832_20863` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20832_20863` `RO 0xFFFFFFFF`
`smmu_ssd_reg_652` `0x4A30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20864_20895` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20864_20895` `RO 0xFFFFFFFF`
`smmu_ssd_reg_653` `0x4A34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20896_20927` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20896_20927` `RO 0xFFFFFFFF`
`smmu_ssd_reg_654` `0x4A38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20928_20959` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20928_20959` `RO 0xFFFFFFFF`
`smmu_ssd_reg_655` `0x4A3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20960_20991` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20960_20991` `RO 0xFFFFFFFF`
`smmu_ssd_reg_656` `0x4A40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_20992_21023` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_20992_21023` `RO 0xFFFFFFFF`
`smmu_ssd_reg_657` `0x4A44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21024_21055` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21024_21055` `RO 0xFFFFFFFF`
`smmu_ssd_reg_658` `0x4A48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21056_21087` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21056_21087` `RO 0xFFFFFFFF`
`smmu_ssd_reg_659` `0x4A4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21088_21119` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21088_21119` `RO 0xFFFFFFFF`
`smmu_ssd_reg_660` `0x4A50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21120_21151` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21120_21151` `RO 0xFFFFFFFF`
`smmu_ssd_reg_661` `0x4A54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21152_21183` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21152_21183` `RO 0xFFFFFFFF`
`smmu_ssd_reg_662` `0x4A58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21184_21215` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21184_21215` `RO 0xFFFFFFFF`
`smmu_ssd_reg_663` `0x4A5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21216_21247` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21216_21247` `RO 0xFFFFFFFF`
`smmu_ssd_reg_664` `0x4A60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21248_21279` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21248_21279` `RO 0xFFFFFFFF`
`smmu_ssd_reg_665` `0x4A64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21280_21311` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21280_21311` `RO 0xFFFFFFFF`
`smmu_ssd_reg_666` `0x4A68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21312_21343` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21312_21343` `RO 0xFFFFFFFF`
`smmu_ssd_reg_667` `0x4A6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21344_21375` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21344_21375` `RO 0xFFFFFFFF`
`smmu_ssd_reg_668` `0x4A70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21376_21407` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21376_21407` `RO 0xFFFFFFFF`
`smmu_ssd_reg_669` `0x4A74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21408_21439` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21408_21439` `RO 0xFFFFFFFF`
`smmu_ssd_reg_670` `0x4A78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21440_21471` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21440_21471` `RO 0xFFFFFFFF`
`smmu_ssd_reg_671` `0x4A7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21472_21503` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21472_21503` `RO 0xFFFFFFFF`
`smmu_ssd_reg_672` `0x4A80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21504_21535` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21504_21535` `RO 0xFFFFFFFF`
`smmu_ssd_reg_673` `0x4A84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21536_21567` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21536_21567` `RO 0xFFFFFFFF`
`smmu_ssd_reg_674` `0x4A88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21568_21599` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21568_21599` `RO 0xFFFFFFFF`
`smmu_ssd_reg_675` `0x4A8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21600_21631` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21600_21631` `RO 0xFFFFFFFF`
`smmu_ssd_reg_676` `0x4A90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21632_21663` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21632_21663` `RO 0xFFFFFFFF`
`smmu_ssd_reg_677` `0x4A94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21664_21695` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21664_21695` `RO 0xFFFFFFFF`
`smmu_ssd_reg_678` `0x4A98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21696_21727` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21696_21727` `RO 0xFFFFFFFF`
`smmu_ssd_reg_679` `0x4A9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21728_21759` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21728_21759` `RO 0xFFFFFFFF`
`smmu_ssd_reg_680` `0x4AA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21760_21791` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21760_21791` `RO 0xFFFFFFFF`
`smmu_ssd_reg_681` `0x4AA4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21792_21823` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21792_21823` `RO 0xFFFFFFFF`
`smmu_ssd_reg_682` `0x4AA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21824_21855` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21824_21855` `RO 0xFFFFFFFF`
`smmu_ssd_reg_683` `0x4AAC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21856_21887` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21856_21887` `RO 0xFFFFFFFF`
`smmu_ssd_reg_684` `0x4AB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21888_21919` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21888_21919` `RO 0xFFFFFFFF`
`smmu_ssd_reg_685` `0x4AB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21920_21951` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21920_21951` `RO 0xFFFFFFFF`
`smmu_ssd_reg_686` `0x4AB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21952_21983` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21952_21983` `RO 0xFFFFFFFF`
`smmu_ssd_reg_687` `0x4ABC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_21984_22015` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_21984_22015` `RO 0xFFFFFFFF`
`smmu_ssd_reg_688` `0x4AC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22016_22047` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22016_22047` `RO 0xFFFFFFFF`
`smmu_ssd_reg_689` `0x4AC4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22048_22079` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22048_22079` `RO 0xFFFFFFFF`
`smmu_ssd_reg_690` `0x4AC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22080_22111` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22080_22111` `RO 0xFFFFFFFF`
`smmu_ssd_reg_691` `0x4ACC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22112_22143` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22112_22143` `RO 0xFFFFFFFF`
`smmu_ssd_reg_692` `0x4AD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22144_22175` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22144_22175` `RO 0xFFFFFFFF`
`smmu_ssd_reg_693` `0x4AD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22176_22207` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22176_22207` `RO 0xFFFFFFFF`
`smmu_ssd_reg_694` `0x4AD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22208_22239` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22208_22239` `RO 0xFFFFFFFF`
`smmu_ssd_reg_695` `0x4ADC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22240_22271` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22240_22271` `RO 0xFFFFFFFF`
`smmu_ssd_reg_696` `0x4AE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22272_22303` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22272_22303` `RO 0xFFFFFFFF`
`smmu_ssd_reg_697` `0x4AE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22304_22335` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22304_22335` `RO 0xFFFFFFFF`
`smmu_ssd_reg_698` `0x4AE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22336_22367` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22336_22367` `RO 0xFFFFFFFF`
`smmu_ssd_reg_699` `0x4AEC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22368_22399` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22368_22399` `RO 0xFFFFFFFF`
`smmu_ssd_reg_700` `0x4AF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22400_22431` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22400_22431` `RO 0xFFFFFFFF`
`smmu_ssd_reg_701` `0x4AF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22432_22463` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22432_22463` `RO 0xFFFFFFFF`
`smmu_ssd_reg_702` `0x4AF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22464_22495` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22464_22495` `RO 0xFFFFFFFF`
`smmu_ssd_reg_703` `0x4AFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22496_22527` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22496_22527` `RO 0xFFFFFFFF`
`smmu_ssd_reg_704` `0x4B00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22528_22559` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22528_22559` `RO 0xFFFFFFFF`
`smmu_ssd_reg_705` `0x4B04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22560_22591` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22560_22591` `RO 0xFFFFFFFF`
`smmu_ssd_reg_706` `0x4B08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22592_22623` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22592_22623` `RO 0xFFFFFFFF`
`smmu_ssd_reg_707` `0x4B0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22624_22655` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22624_22655` `RO 0xFFFFFFFF`
`smmu_ssd_reg_708` `0x4B10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22656_22687` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22656_22687` `RO 0xFFFFFFFF`
`smmu_ssd_reg_709` `0x4B14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22688_22719` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22688_22719` `RO 0xFFFFFFFF`
`smmu_ssd_reg_710` `0x4B18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22720_22751` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22720_22751` `RO 0xFFFFFFFF`
`smmu_ssd_reg_711` `0x4B1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22752_22783` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22752_22783` `RO 0xFFFFFFFF`
`smmu_ssd_reg_712` `0x4B20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22784_22815` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22784_22815` `RO 0xFFFFFFFF`
`smmu_ssd_reg_713` `0x4B24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22816_22847` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22816_22847` `RO 0xFFFFFFFF`
`smmu_ssd_reg_714` `0x4B28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22848_22879` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22848_22879` `RO 0xFFFFFFFF`
`smmu_ssd_reg_715` `0x4B2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22880_22911` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22880_22911` `RO 0xFFFFFFFF`
`smmu_ssd_reg_716` `0x4B30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22912_22943` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22912_22943` `RO 0xFFFFFFFF`
`smmu_ssd_reg_717` `0x4B34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22944_22975` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22944_22975` `RO 0xFFFFFFFF`
`smmu_ssd_reg_718` `0x4B38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_22976_23007` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_22976_23007` `RO 0xFFFFFFFF`
`smmu_ssd_reg_719` `0x4B3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23008_23039` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23008_23039` `RO 0xFFFFFFFF`
`smmu_ssd_reg_720` `0x4B40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23040_23071` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23040_23071` `RO 0xFFFFFFFF`
`smmu_ssd_reg_721` `0x4B44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23072_23103` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23072_23103` `RO 0xFFFFFFFF`
`smmu_ssd_reg_722` `0x4B48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23104_23135` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23104_23135` `RO 0xFFFFFFFF`
`smmu_ssd_reg_723` `0x4B4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23136_23167` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23136_23167` `RO 0xFFFFFFFF`
`smmu_ssd_reg_724` `0x4B50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23168_23199` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23168_23199` `RO 0xFFFFFFFF`
`smmu_ssd_reg_725` `0x4B54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23200_23231` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23200_23231` `RO 0xFFFFFFFF`
`smmu_ssd_reg_726` `0x4B58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23232_23263` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23232_23263` `RO 0xFFFFFFFF`
`smmu_ssd_reg_727` `0x4B5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23264_23295` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23264_23295` `RO 0xFFFFFFFF`
`smmu_ssd_reg_728` `0x4B60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23296_23327` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23296_23327` `RO 0xFFFFFFFF`
`smmu_ssd_reg_729` `0x4B64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23328_23359` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23328_23359` `RO 0xFFFFFFFF`
`smmu_ssd_reg_730` `0x4B68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23360_23391` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23360_23391` `RO 0xFFFFFFFF`
`smmu_ssd_reg_731` `0x4B6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23392_23423` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23392_23423` `RO 0xFFFFFFFF`
`smmu_ssd_reg_732` `0x4B70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23424_23455` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23424_23455` `RO 0xFFFFFFFF`
`smmu_ssd_reg_733` `0x4B74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23456_23487` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23456_23487` `RO 0xFFFFFFFF`
`smmu_ssd_reg_734` `0x4B78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23488_23519` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23488_23519` `RO 0xFFFFFFFF`
`smmu_ssd_reg_735` `0x4B7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23520_23551` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23520_23551` `RO 0xFFFFFFFF`
`smmu_ssd_reg_736` `0x4B80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23552_23583` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23552_23583` `RO 0xFFFFFFFF`
`smmu_ssd_reg_737` `0x4B84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23584_23615` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23584_23615` `RO 0xFFFFFFFF`
`smmu_ssd_reg_738` `0x4B88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23616_23647` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23616_23647` `RO 0xFFFFFFFF`
`smmu_ssd_reg_739` `0x4B8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23648_23679` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23648_23679` `RO 0xFFFFFFFF`
`smmu_ssd_reg_740` `0x4B90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23680_23711` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23680_23711` `RO 0xFFFFFFFF`
`smmu_ssd_reg_741` `0x4B94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23712_23743` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23712_23743` `RO 0xFFFFFFFF`
`smmu_ssd_reg_742` `0x4B98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23744_23775` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23744_23775` `RO 0xFFFFFFFF`
`smmu_ssd_reg_743` `0x4B9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23776_23807` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23776_23807` `RO 0xFFFFFFFF`
`smmu_ssd_reg_744` `0x4BA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23808_23839` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23808_23839` `RO 0xFFFFFFFF`
`smmu_ssd_reg_745` `0x4BA4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23840_23871` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23840_23871` `RO 0xFFFFFFFF`
`smmu_ssd_reg_746` `0x4BA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23872_23903` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23872_23903` `RO 0xFFFFFFFF`
`smmu_ssd_reg_747` `0x4BAC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23904_23935` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23904_23935` `RO 0xFFFFFFFF`
`smmu_ssd_reg_748` `0x4BB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23936_23967` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23936_23967` `RO 0xFFFFFFFF`
`smmu_ssd_reg_749` `0x4BB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_23968_23999` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_23968_23999` `RO 0xFFFFFFFF`
`smmu_ssd_reg_750` `0x4BB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24000_24031` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24000_24031` `RO 0xFFFFFFFF`
`smmu_ssd_reg_751` `0x4BBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24032_24063` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24032_24063` `RO 0xFFFFFFFF`
`smmu_ssd_reg_752` `0x4BC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24064_24095` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24064_24095` `RO 0xFFFFFFFF`
`smmu_ssd_reg_753` `0x4BC4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24096_24127` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24096_24127` `RO 0xFFFFFFFF`
`smmu_ssd_reg_754` `0x4BC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24128_24159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24128_24159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_755` `0x4BCC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24160_24191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24160_24191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_756` `0x4BD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24192_24223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24192_24223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_757` `0x4BD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24224_24255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24224_24255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_758` `0x4BD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24256_24287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24256_24287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_759` `0x4BDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24288_24319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24288_24319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_760` `0x4BE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24320_24351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24320_24351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_761` `0x4BE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24352_24383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24352_24383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_762` `0x4BE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24384_24415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24384_24415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_763` `0x4BEC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24416_24447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24416_24447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_764` `0x4BF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24448_24479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24448_24479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_765` `0x4BF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24480_24511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24480_24511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_766` `0x4BF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24512_24543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24512_24543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_767` `0x4BFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24544_24575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24544_24575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_768` `0x4C00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24576_24607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24576_24607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_769` `0x4C04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24608_24639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24608_24639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_770` `0x4C08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24640_24671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24640_24671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_771` `0x4C0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24672_24703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24672_24703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_772` `0x4C10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24704_24735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24704_24735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_773` `0x4C14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24736_24767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24736_24767` `RO 0xFFFFFFFF`
`smmu_ssd_reg_774` `0x4C18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24768_24799` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24768_24799` `RO 0xFFFFFFFF`
`smmu_ssd_reg_775` `0x4C1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24800_24831` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24800_24831` `RO 0xFFFFFFFF`
`smmu_ssd_reg_776` `0x4C20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24832_24863` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24832_24863` `RO 0xFFFFFFFF`
`smmu_ssd_reg_777` `0x4C24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24864_24895` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24864_24895` `RO 0xFFFFFFFF`
`smmu_ssd_reg_778` `0x4C28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24896_24927` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24896_24927` `RO 0xFFFFFFFF`
`smmu_ssd_reg_779` `0x4C2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24928_24959` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24928_24959` `RO 0xFFFFFFFF`
`smmu_ssd_reg_780` `0x4C30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24960_24991` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24960_24991` `RO 0xFFFFFFFF`
`smmu_ssd_reg_781` `0x4C34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_24992_25023` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_24992_25023` `RO 0xFFFFFFFF`
`smmu_ssd_reg_782` `0x4C38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25024_25055` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25024_25055` `RO 0xFFFFFFFF`
`smmu_ssd_reg_783` `0x4C3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25056_25087` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25056_25087` `RO 0xFFFFFFFF`
`smmu_ssd_reg_784` `0x4C40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25088_25119` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25088_25119` `RO 0xFFFFFFFF`
`smmu_ssd_reg_785` `0x4C44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25120_25151` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25120_25151` `RO 0xFFFFFFFF`
`smmu_ssd_reg_786` `0x4C48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25152_25183` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25152_25183` `RO 0xFFFFFFFF`
`smmu_ssd_reg_787` `0x4C4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25184_25215` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25184_25215` `RO 0xFFFFFFFF`
`smmu_ssd_reg_788` `0x4C50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25216_25247` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25216_25247` `RO 0xFFFFFFFF`
`smmu_ssd_reg_789` `0x4C54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25248_25279` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25248_25279` `RO 0xFFFFFFFF`
`smmu_ssd_reg_790` `0x4C58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25280_25311` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25280_25311` `RO 0xFFFFFFFF`
`smmu_ssd_reg_791` `0x4C5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25312_25343` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25312_25343` `RO 0xFFFFFFFF`
`smmu_ssd_reg_792` `0x4C60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25344_25375` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25344_25375` `RO 0xFFFFFFFF`
`smmu_ssd_reg_793` `0x4C64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25376_25407` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25376_25407` `RO 0xFFFFFFFF`
`smmu_ssd_reg_794` `0x4C68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25408_25439` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25408_25439` `RO 0xFFFFFFFF`
`smmu_ssd_reg_795` `0x4C6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25440_25471` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25440_25471` `RO 0xFFFFFFFF`
`smmu_ssd_reg_796` `0x4C70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25472_25503` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25472_25503` `RO 0xFFFFFFFF`
`smmu_ssd_reg_797` `0x4C74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25504_25535` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25504_25535` `RO 0xFFFFFFFF`
`smmu_ssd_reg_798` `0x4C78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25536_25567` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25536_25567` `RO 0xFFFFFFFF`
`smmu_ssd_reg_799` `0x4C7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25568_25599` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25568_25599` `RO 0xFFFFFFFF`
`smmu_ssd_reg_800` `0x4C80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25600_25631` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25600_25631` `RO 0xFFFFFFFF`
`smmu_ssd_reg_801` `0x4C84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25632_25663` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25632_25663` `RO 0xFFFFFFFF`
`smmu_ssd_reg_802` `0x4C88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25664_25695` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25664_25695` `RO 0xFFFFFFFF`
`smmu_ssd_reg_803` `0x4C8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25696_25727` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25696_25727` `RO 0xFFFFFFFF`
`smmu_ssd_reg_804` `0x4C90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25728_25759` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25728_25759` `RO 0xFFFFFFFF`
`smmu_ssd_reg_805` `0x4C94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25760_25791` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25760_25791` `RO 0xFFFFFFFF`
`smmu_ssd_reg_806` `0x4C98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25792_25823` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25792_25823` `RO 0xFFFFFFFF`
`smmu_ssd_reg_807` `0x4C9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25824_25855` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25824_25855` `RO 0xFFFFFFFF`
`smmu_ssd_reg_808` `0x4CA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25856_25887` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25856_25887` `RO 0xFFFFFFFF`
`smmu_ssd_reg_809` `0x4CA4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25888_25919` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25888_25919` `RO 0xFFFFFFFF`
`smmu_ssd_reg_810` `0x4CA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25920_25951` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25920_25951` `RO 0xFFFFFFFF`
`smmu_ssd_reg_811` `0x4CAC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25952_25983` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25952_25983` `RO 0xFFFFFFFF`
`smmu_ssd_reg_812` `0x4CB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_25984_26015` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_25984_26015` `RO 0xFFFFFFFF`
`smmu_ssd_reg_813` `0x4CB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26016_26047` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26016_26047` `RO 0xFFFFFFFF`
`smmu_ssd_reg_814` `0x4CB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26048_26079` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26048_26079` `RO 0xFFFFFFFF`
`smmu_ssd_reg_815` `0x4CBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26080_26111` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26080_26111` `RO 0xFFFFFFFF`
`smmu_ssd_reg_816` `0x4CC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26112_26143` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26112_26143` `RO 0xFFFFFFFF`
`smmu_ssd_reg_817` `0x4CC4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26144_26175` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26144_26175` `RO 0xFFFFFFFF`
`smmu_ssd_reg_818` `0x4CC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26176_26207` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26176_26207` `RO 0xFFFFFFFF`
`smmu_ssd_reg_819` `0x4CCC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26208_26239` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26208_26239` `RO 0xFFFFFFFF`
`smmu_ssd_reg_820` `0x4CD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26240_26271` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26240_26271` `RO 0xFFFFFFFF`
`smmu_ssd_reg_821` `0x4CD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26272_26303` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26272_26303` `RO 0xFFFFFFFF`
`smmu_ssd_reg_822` `0x4CD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26304_26335` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26304_26335` `RO 0xFFFFFFFF`
`smmu_ssd_reg_823` `0x4CDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26336_26367` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26336_26367` `RO 0xFFFFFFFF`
`smmu_ssd_reg_824` `0x4CE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26368_26399` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26368_26399` `RO 0xFFFFFFFF`
`smmu_ssd_reg_825` `0x4CE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26400_26431` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26400_26431` `RO 0xFFFFFFFF`
`smmu_ssd_reg_826` `0x4CE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26432_26463` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26432_26463` `RO 0xFFFFFFFF`
`smmu_ssd_reg_827` `0x4CEC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26464_26495` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26464_26495` `RO 0xFFFFFFFF`
`smmu_ssd_reg_828` `0x4CF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26496_26527` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26496_26527` `RO 0xFFFFFFFF`
`smmu_ssd_reg_829` `0x4CF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26528_26559` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26528_26559` `RO 0xFFFFFFFF`
`smmu_ssd_reg_830` `0x4CF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26560_26591` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26560_26591` `RO 0xFFFFFFFF`
`smmu_ssd_reg_831` `0x4CFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26592_26623` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26592_26623` `RO 0xFFFFFFFF`
`smmu_ssd_reg_832` `0x4D00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26624_26655` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26624_26655` `RO 0xFFFFFFFF`
`smmu_ssd_reg_833` `0x4D04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26656_26687` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26656_26687` `RO 0xFFFFFFFF`
`smmu_ssd_reg_834` `0x4D08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26688_26719` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26688_26719` `RO 0xFFFFFFFF`
`smmu_ssd_reg_835` `0x4D0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26720_26751` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26720_26751` `RO 0xFFFFFFFF`
`smmu_ssd_reg_836` `0x4D10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26752_26783` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26752_26783` `RO 0xFFFFFFFF`
`smmu_ssd_reg_837` `0x4D14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26784_26815` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26784_26815` `RO 0xFFFFFFFF`
`smmu_ssd_reg_838` `0x4D18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26816_26847` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26816_26847` `RO 0xFFFFFFFF`
`smmu_ssd_reg_839` `0x4D1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26848_26879` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26848_26879` `RO 0xFFFFFFFF`
`smmu_ssd_reg_840` `0x4D20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26880_26911` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26880_26911` `RO 0xFFFFFFFF`
`smmu_ssd_reg_841` `0x4D24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26912_26943` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26912_26943` `RO 0xFFFFFFFF`
`smmu_ssd_reg_842` `0x4D28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26944_26975` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26944_26975` `RO 0xFFFFFFFF`
`smmu_ssd_reg_843` `0x4D2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_26976_27007` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_26976_27007` `RO 0xFFFFFFFF`
`smmu_ssd_reg_844` `0x4D30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27008_27039` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27008_27039` `RO 0xFFFFFFFF`
`smmu_ssd_reg_845` `0x4D34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27040_27071` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27040_27071` `RO 0xFFFFFFFF`
`smmu_ssd_reg_846` `0x4D38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27072_27103` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27072_27103` `RO 0xFFFFFFFF`
`smmu_ssd_reg_847` `0x4D3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27104_27135` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27104_27135` `RO 0xFFFFFFFF`
`smmu_ssd_reg_848` `0x4D40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27136_27167` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27136_27167` `RO 0xFFFFFFFF`
`smmu_ssd_reg_849` `0x4D44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27168_27199` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27168_27199` `RO 0xFFFFFFFF`
`smmu_ssd_reg_850` `0x4D48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27200_27231` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27200_27231` `RO 0xFFFFFFFF`
`smmu_ssd_reg_851` `0x4D4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27232_27263` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27232_27263` `RO 0xFFFFFFFF`
`smmu_ssd_reg_852` `0x4D50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27264_27295` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27264_27295` `RO 0xFFFFFFFF`
`smmu_ssd_reg_853` `0x4D54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27296_27327` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27296_27327` `RO 0xFFFFFFFF`
`smmu_ssd_reg_854` `0x4D58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27328_27359` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27328_27359` `RO 0xFFFFFFFF`
`smmu_ssd_reg_855` `0x4D5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27360_27391` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27360_27391` `RO 0xFFFFFFFF`
`smmu_ssd_reg_856` `0x4D60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27392_27423` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27392_27423` `RO 0xFFFFFFFF`
`smmu_ssd_reg_857` `0x4D64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27424_27455` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27424_27455` `RO 0xFFFFFFFF`
`smmu_ssd_reg_858` `0x4D68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27456_27487` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27456_27487` `RO 0xFFFFFFFF`
`smmu_ssd_reg_859` `0x4D6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27488_27519` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27488_27519` `RO 0xFFFFFFFF`
`smmu_ssd_reg_860` `0x4D70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27520_27551` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27520_27551` `RO 0xFFFFFFFF`
`smmu_ssd_reg_861` `0x4D74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27552_27583` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27552_27583` `RO 0xFFFFFFFF`
`smmu_ssd_reg_862` `0x4D78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27584_27615` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27584_27615` `RO 0xFFFFFFFF`
`smmu_ssd_reg_863` `0x4D7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27616_27647` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27616_27647` `RO 0xFFFFFFFF`
`smmu_ssd_reg_864` `0x4D80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27648_27679` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27648_27679` `RO 0xFFFFFFFF`
`smmu_ssd_reg_865` `0x4D84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27680_27711` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27680_27711` `RO 0xFFFFFFFF`
`smmu_ssd_reg_866` `0x4D88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27712_27743` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27712_27743` `RO 0xFFFFFFFF`
`smmu_ssd_reg_867` `0x4D8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27744_27775` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27744_27775` `RO 0xFFFFFFFF`
`smmu_ssd_reg_868` `0x4D90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27776_27807` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27776_27807` `RO 0xFFFFFFFF`
`smmu_ssd_reg_869` `0x4D94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27808_27839` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27808_27839` `RO 0xFFFFFFFF`
`smmu_ssd_reg_870` `0x4D98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27840_27871` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27840_27871` `RO 0xFFFFFFFF`
`smmu_ssd_reg_871` `0x4D9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27872_27903` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27872_27903` `RO 0xFFFFFFFF`
`smmu_ssd_reg_872` `0x4DA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27904_27935` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27904_27935` `RO 0xFFFFFFFF`
`smmu_ssd_reg_873` `0x4DA4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27936_27967` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27936_27967` `RO 0xFFFFFFFF`
`smmu_ssd_reg_874` `0x4DA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_27968_27999` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_27968_27999` `RO 0xFFFFFFFF`
`smmu_ssd_reg_875` `0x4DAC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28000_28031` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28000_28031` `RO 0xFFFFFFFF`
`smmu_ssd_reg_876` `0x4DB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28032_28063` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28032_28063` `RO 0xFFFFFFFF`
`smmu_ssd_reg_877` `0x4DB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28064_28095` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28064_28095` `RO 0xFFFFFFFF`
`smmu_ssd_reg_878` `0x4DB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28096_28127` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28096_28127` `RO 0xFFFFFFFF`
`smmu_ssd_reg_879` `0x4DBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28128_28159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28128_28159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_880` `0x4DC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28160_28191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28160_28191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_881` `0x4DC4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28192_28223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28192_28223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_882` `0x4DC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28224_28255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28224_28255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_883` `0x4DCC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28256_28287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28256_28287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_884` `0x4DD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28288_28319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28288_28319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_885` `0x4DD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28320_28351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28320_28351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_886` `0x4DD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28352_28383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28352_28383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_887` `0x4DDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28384_28415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28384_28415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_888` `0x4DE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28416_28447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28416_28447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_889` `0x4DE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28448_28479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28448_28479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_890` `0x4DE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28480_28511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28480_28511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_891` `0x4DEC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28512_28543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28512_28543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_892` `0x4DF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28544_28575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28544_28575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_893` `0x4DF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28576_28607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28576_28607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_894` `0x4DF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28608_28639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28608_28639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_895` `0x4DFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28640_28671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28640_28671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_896` `0x4E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28672_28703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28672_28703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_897` `0x4E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28704_28735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28704_28735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_898` `0x4E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28736_28767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28736_28767` `RO 0xFFFFFFFF`
`smmu_ssd_reg_899` `0x4E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28768_28799` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28768_28799` `RO 0xFFFFFFFF`
`smmu_ssd_reg_900` `0x4E10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28800_28831` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28800_28831` `RO 0xFFFFFFFF`
`smmu_ssd_reg_901` `0x4E14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28832_28863` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28832_28863` `RO 0xFFFFFFFF`
`smmu_ssd_reg_902` `0x4E18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28864_28895` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28864_28895` `RO 0xFFFFFFFF`
`smmu_ssd_reg_903` `0x4E1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28896_28927` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28896_28927` `RO 0xFFFFFFFF`
`smmu_ssd_reg_904` `0x4E20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28928_28959` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28928_28959` `RO 0xFFFFFFFF`
`smmu_ssd_reg_905` `0x4E24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28960_28991` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28960_28991` `RO 0xFFFFFFFF`
`smmu_ssd_reg_906` `0x4E28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_28992_29023` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_28992_29023` `RO 0xFFFFFFFF`
`smmu_ssd_reg_907` `0x4E2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29024_29055` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29024_29055` `RO 0xFFFFFFFF`
`smmu_ssd_reg_908` `0x4E30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29056_29087` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29056_29087` `RO 0xFFFFFFFF`
`smmu_ssd_reg_909` `0x4E34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29088_29119` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29088_29119` `RO 0xFFFFFFFF`
`smmu_ssd_reg_910` `0x4E38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29120_29151` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29120_29151` `RO 0xFFFFFFFF`
`smmu_ssd_reg_911` `0x4E3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29152_29183` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29152_29183` `RO 0xFFFFFFFF`
`smmu_ssd_reg_912` `0x4E40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29184_29215` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29184_29215` `RO 0xFFFFFFFF`
`smmu_ssd_reg_913` `0x4E44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29216_29247` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29216_29247` `RO 0xFFFFFFFF`
`smmu_ssd_reg_914` `0x4E48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29248_29279` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29248_29279` `RO 0xFFFFFFFF`
`smmu_ssd_reg_915` `0x4E4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29280_29311` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29280_29311` `RO 0xFFFFFFFF`
`smmu_ssd_reg_916` `0x4E50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29312_29343` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29312_29343` `RO 0xFFFFFFFF`
`smmu_ssd_reg_917` `0x4E54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29344_29375` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29344_29375` `RO 0xFFFFFFFF`
`smmu_ssd_reg_918` `0x4E58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29376_29407` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29376_29407` `RO 0xFFFFFFFF`
`smmu_ssd_reg_919` `0x4E5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29408_29439` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29408_29439` `RO 0xFFFFFFFF`
`smmu_ssd_reg_920` `0x4E60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29440_29471` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29440_29471` `RO 0xFFFFFFFF`
`smmu_ssd_reg_921` `0x4E64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29472_29503` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29472_29503` `RO 0xFFFFFFFF`
`smmu_ssd_reg_922` `0x4E68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29504_29535` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29504_29535` `RO 0xFFFFFFFF`
`smmu_ssd_reg_923` `0x4E6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29536_29567` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29536_29567` `RO 0xFFFFFFFF`
`smmu_ssd_reg_924` `0x4E70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29568_29599` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29568_29599` `RO 0xFFFFFFFF`
`smmu_ssd_reg_925` `0x4E74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29600_29631` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29600_29631` `RO 0xFFFFFFFF`
`smmu_ssd_reg_926` `0x4E78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29632_29663` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29632_29663` `RO 0xFFFFFFFF`
`smmu_ssd_reg_927` `0x4E7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29664_29695` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29664_29695` `RO 0xFFFFFFFF`
`smmu_ssd_reg_928` `0x4E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29696_29727` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29696_29727` `RO 0xFFFFFFFF`
`smmu_ssd_reg_929` `0x4E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29728_29759` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29728_29759` `RO 0xFFFFFFFF`
`smmu_ssd_reg_930` `0x4E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29760_29791` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29760_29791` `RO 0xFFFFFFFF`
`smmu_ssd_reg_931` `0x4E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29792_29823` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29792_29823` `RO 0xFFFFFFFF`
`smmu_ssd_reg_932` `0x4E90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29824_29855` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29824_29855` `RO 0xFFFFFFFF`
`smmu_ssd_reg_933` `0x4E94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29856_29887` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29856_29887` `RO 0xFFFFFFFF`
`smmu_ssd_reg_934` `0x4E98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29888_29919` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29888_29919` `RO 0xFFFFFFFF`
`smmu_ssd_reg_935` `0x4E9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29920_29951` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29920_29951` `RO 0xFFFFFFFF`
`smmu_ssd_reg_936` `0x4EA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29952_29983` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29952_29983` `RO 0xFFFFFFFF`
`smmu_ssd_reg_937` `0x4EA4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_29984_30015` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_29984_30015` `RO 0xFFFFFFFF`
`smmu_ssd_reg_938` `0x4EA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30016_30047` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30016_30047` `RO 0xFFFFFFFF`
`smmu_ssd_reg_939` `0x4EAC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30048_30079` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30048_30079` `RO 0xFFFFFFFF`
`smmu_ssd_reg_940` `0x4EB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30080_30111` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30080_30111` `RO 0xFFFFFFFF`
`smmu_ssd_reg_941` `0x4EB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30112_30143` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30112_30143` `RO 0xFFFFFFFF`
`smmu_ssd_reg_942` `0x4EB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30144_30175` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30144_30175` `RO 0xFFFFFFFF`
`smmu_ssd_reg_943` `0x4EBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30176_30207` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30176_30207` `RO 0xFFFFFFFF`
`smmu_ssd_reg_944` `0x4EC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30208_30239` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30208_30239` `RO 0xFFFFFFFF`
`smmu_ssd_reg_945` `0x4EC4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30240_30271` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30240_30271` `RO 0xFFFFFFFF`
`smmu_ssd_reg_946` `0x4EC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30272_30303` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30272_30303` `RO 0xFFFFFFFF`
`smmu_ssd_reg_947` `0x4ECC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30304_30335` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30304_30335` `RO 0xFFFFFFFF`
`smmu_ssd_reg_948` `0x4ED0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30336_30367` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30336_30367` `RO 0xFFFFFFFF`
`smmu_ssd_reg_949` `0x4ED4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30368_30399` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30368_30399` `RO 0xFFFFFFFF`
`smmu_ssd_reg_950` `0x4ED8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30400_30431` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30400_30431` `RO 0xFFFFFFFF`
`smmu_ssd_reg_951` `0x4EDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30432_30463` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30432_30463` `RO 0xFFFFFFFF`
`smmu_ssd_reg_952` `0x4EE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30464_30495` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30464_30495` `RO 0xFFFFFFFF`
`smmu_ssd_reg_953` `0x4EE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30496_30527` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30496_30527` `RO 0xFFFFFFFF`
`smmu_ssd_reg_954` `0x4EE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30528_30559` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30528_30559` `RO 0xFFFFFFFF`
`smmu_ssd_reg_955` `0x4EEC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30560_30591` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30560_30591` `RO 0xFFFFFFFF`
`smmu_ssd_reg_956` `0x4EF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30592_30623` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30592_30623` `RO 0xFFFFFFFF`
`smmu_ssd_reg_957` `0x4EF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30624_30655` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30624_30655` `RO 0xFFFFFFFF`
`smmu_ssd_reg_958` `0x4EF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30656_30687` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30656_30687` `RO 0xFFFFFFFF`
`smmu_ssd_reg_959` `0x4EFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30688_30719` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30688_30719` `RO 0xFFFFFFFF`
`smmu_ssd_reg_960` `0x4F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30720_30751` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30720_30751` `RO 0xFFFFFFFF`
`smmu_ssd_reg_961` `0x4F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30752_30783` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30752_30783` `RO 0xFFFFFFFF`
`smmu_ssd_reg_962` `0x4F08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30784_30815` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30784_30815` `RO 0xFFFFFFFF`
`smmu_ssd_reg_963` `0x4F0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30816_30847` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30816_30847` `RO 0xFFFFFFFF`
`smmu_ssd_reg_964` `0x4F10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30848_30879` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30848_30879` `RO 0xFFFFFFFF`
`smmu_ssd_reg_965` `0x4F14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30880_30911` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30880_30911` `RO 0xFFFFFFFF`
`smmu_ssd_reg_966` `0x4F18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30912_30943` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30912_30943` `RO 0xFFFFFFFF`
`smmu_ssd_reg_967` `0x4F1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30944_30975` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30944_30975` `RO 0xFFFFFFFF`
`smmu_ssd_reg_968` `0x4F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_30976_31007` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_30976_31007` `RO 0xFFFFFFFF`
`smmu_ssd_reg_969` `0x4F24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31008_31039` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31008_31039` `RO 0xFFFFFFFF`
`smmu_ssd_reg_970` `0x4F28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31040_31071` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31040_31071` `RO 0xFFFFFFFF`
`smmu_ssd_reg_971` `0x4F2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31072_31103` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31072_31103` `RO 0xFFFFFFFF`
`smmu_ssd_reg_972` `0x4F30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31104_31135` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31104_31135` `RO 0xFFFFFFFF`
`smmu_ssd_reg_973` `0x4F34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31136_31167` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31136_31167` `RO 0xFFFFFFFF`
`smmu_ssd_reg_974` `0x4F38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31168_31199` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31168_31199` `RO 0xFFFFFFFF`
`smmu_ssd_reg_975` `0x4F3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31200_31231` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31200_31231` `RO 0xFFFFFFFF`
`smmu_ssd_reg_976` `0x4F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31232_31263` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31232_31263` `RO 0xFFFFFFFF`
`smmu_ssd_reg_977` `0x4F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31264_31295` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31264_31295` `RO 0xFFFFFFFF`
`smmu_ssd_reg_978` `0x4F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31296_31327` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31296_31327` `RO 0xFFFFFFFF`
`smmu_ssd_reg_979` `0x4F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31328_31359` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31328_31359` `RO 0xFFFFFFFF`
`smmu_ssd_reg_980` `0x4F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31360_31391` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31360_31391` `RO 0xFFFFFFFF`
`smmu_ssd_reg_981` `0x4F54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31392_31423` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31392_31423` `RO 0xFFFFFFFF`
`smmu_ssd_reg_982` `0x4F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31424_31455` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31424_31455` `RO 0xFFFFFFFF`
`smmu_ssd_reg_983` `0x4F5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31456_31487` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31456_31487` `RO 0xFFFFFFFF`
`smmu_ssd_reg_984` `0x4F60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31488_31519` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31488_31519` `RO 0xFFFFFFFF`
`smmu_ssd_reg_985` `0x4F64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31520_31551` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31520_31551` `RO 0xFFFFFFFF`
`smmu_ssd_reg_986` `0x4F68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31552_31583` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31552_31583` `RO 0xFFFFFFFF`
`smmu_ssd_reg_987` `0x4F6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31584_31615` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31584_31615` `RO 0xFFFFFFFF`
`smmu_ssd_reg_988` `0x4F70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31616_31647` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31616_31647` `RO 0xFFFFFFFF`
`smmu_ssd_reg_989` `0x4F74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31648_31679` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31648_31679` `RO 0xFFFFFFFF`
`smmu_ssd_reg_990` `0x4F78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31680_31711` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31680_31711` `RO 0xFFFFFFFF`
`smmu_ssd_reg_991` `0x4F7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31712_31743` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31712_31743` `RO 0xFFFFFFFF`
`smmu_ssd_reg_992` `0x4F80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31744_31775` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31744_31775` `RO 0xFFFFFFFF`
`smmu_ssd_reg_993` `0x4F84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31776_31807` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31776_31807` `RO 0xFFFFFFFF`
`smmu_ssd_reg_994` `0x4F88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31808_31839` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31808_31839` `RO 0xFFFFFFFF`
`smmu_ssd_reg_995` `0x4F8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31840_31871` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31840_31871` `RO 0xFFFFFFFF`
`smmu_ssd_reg_996` `0x4F90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31872_31903` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31872_31903` `RO 0xFFFFFFFF`
`smmu_ssd_reg_997` `0x4F94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31904_31935` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31904_31935` `RO 0xFFFFFFFF`
`smmu_ssd_reg_998` `0x4F98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31936_31967` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31936_31967` `RO 0xFFFFFFFF`
`smmu_ssd_reg_999` `0x4F9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_31968_31999` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_31968_31999` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1000` `0x4FA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32000_32031` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32000_32031` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1001` `0x4FA4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32032_32063` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32032_32063` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1002` `0x4FA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32064_32095` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32064_32095` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1003` `0x4FAC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32096_32127` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32096_32127` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1004` `0x4FB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32128_32159` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32128_32159` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1005` `0x4FB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32160_32191` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32160_32191` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1006` `0x4FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32192_32223` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32192_32223` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1007` `0x4FBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32224_32255` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32224_32255` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1008` `0x4FC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32256_32287` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32256_32287` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1009` `0x4FC4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32288_32319` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32288_32319` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1010` `0x4FC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32320_32351` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32320_32351` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1011` `0x4FCC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32352_32383` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32352_32383` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1012` `0x4FD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32384_32415` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32384_32415` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1013` `0x4FD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32416_32447` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32416_32447` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1014` `0x4FD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32448_32479` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32448_32479` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1015` `0x4FDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32480_32511` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32480_32511` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1016` `0x4FE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32512_32543` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32512_32543` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1017` `0x4FE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32544_32575` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32544_32575` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1018` `0x4FE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32576_32607` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32576_32607` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1019` `0x4FEC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32608_32639` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32608_32639` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1020` `0x4FF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32640_32671` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32640_32671` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1021` `0x4FF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32672_32703` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32672_32703` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1022` `0x4FF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32704_32735` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32704_32735` `RO 0xFFFFFFFF`
`smmu_ssd_reg_1023` `0x4FFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ssd_index_32736_32767` `RO 0xFFFFFFFF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ssd_index_32736_32767` `RO 0xFFFFFFFF`
`SMMU_CB0_SCTLR` `0x20000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB1_SCTLR` `0x21000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB2_SCTLR` `0x22000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB3_SCTLR` `0x23000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB4_SCTLR` `0x24000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB5_SCTLR` `0x25000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB6_SCTLR` `0x26000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB7_SCTLR` `0x27000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB8_SCTLR` `0x28000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB9_SCTLR` `0x29000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB10_SCTLR` `0x2A000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB11_SCTLR` `0x2B000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB12_SCTLR` `0x2C000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB13_SCTLR` `0x2D000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB14_SCTLR` `0x2E000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB15_SCTLR` `0x2F000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB16_SCTLR` `0x30000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB17_SCTLR` `0x31000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB18_SCTLR` `0x32000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB19_SCTLR` `0x33000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB20_SCTLR` `0x34000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB21_SCTLR` `0x35000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB22_SCTLR` `0x36000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB23_SCTLR` `0x37000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB24_SCTLR` `0x38000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB25_SCTLR` `0x39000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB26_SCTLR` `0x3A000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB27_SCTLR` `0x3B000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB28_SCTLR` `0x3C000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB29_SCTLR` `0x3D000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB30_SCTLR` `0x3E000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB31_SCTLR` `0x3F000` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`NSCFG` `RW 0x0`		`WACFG` `RW 0x0`		`RACFG` `RW 0x0`		`SHCFG` `RW 0x0`		`FB` `RW 0x0`	`MTCFG` `RW 0x0`	`MemAttr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TRANSIENTCFG` `RW 0x0`		`PTW` `RW 0x0`	`ASIDPNE` `RO 0x0`	`Reserved`	`UWXN` `RW 0x0`	`WXN` `RW 0x0`	`HUPCF` `RW 0x1`	`CFCFG` `RW 0x0`	`CFIE` `RW 0x0`	`CFRE` `RW 0x0`	`E` `RW 0x0`	`AFFD` `RW 0x0`	`AFE` `RW 0x0`	`TRE` `RW 0x0`	`M` `RW 0x0`
`SMMU_CB0_ACTLR` `0x20004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB1_ACTLR` `0x21004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB2_ACTLR` `0x22004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB3_ACTLR` `0x23004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB4_ACTLR` `0x24004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB5_ACTLR` `0x25004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB6_ACTLR` `0x26004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB7_ACTLR` `0x27004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB8_ACTLR` `0x28004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB9_ACTLR` `0x29004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB10_ACTLR` `0x2A004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB11_ACTLR` `0x2B004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB12_ACTLR` `0x2C004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB13_ACTLR` `0x2D004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB14_ACTLR` `0x2E004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB15_ACTLR` `0x2F004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB16_ACTLR` `0x30004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB17_ACTLR` `0x31004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB18_ACTLR` `0x32004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB19_ACTLR` `0x33004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB20_ACTLR` `0x34004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB21_ACTLR` `0x35004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB22_ACTLR` `0x36004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB23_ACTLR` `0x37004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB24_ACTLR` `0x38004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB25_ACTLR` `0x39004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB26_ACTLR` `0x3A004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB27_ACTLR` `0x3B004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB28_ACTLR` `0x3C004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB29_ACTLR` `0x3D004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB30_ACTLR` `0x3E004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB31_ACTLR` `0x3F004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`CPRE` `RW 0x1`	`CMTLB` `RW 0x1`
`SMMU_CB0_RESUME` `0x20008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB1_RESUME` `0x21008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB2_RESUME` `0x22008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB3_RESUME` `0x23008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB4_RESUME` `0x24008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB5_RESUME` `0x25008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB6_RESUME` `0x26008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB7_RESUME` `0x27008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB8_RESUME` `0x28008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB9_RESUME` `0x29008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB10_RESUME` `0x2A008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB11_RESUME` `0x2B008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB12_RESUME` `0x2C008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB13_RESUME` `0x2D008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB14_RESUME` `0x2E008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB15_RESUME` `0x2F008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB16_RESUME` `0x30008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB17_RESUME` `0x31008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB18_RESUME` `0x32008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB19_RESUME` `0x33008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB20_RESUME` `0x34008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB21_RESUME` `0x35008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB22_RESUME` `0x36008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB23_RESUME` `0x37008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB24_RESUME` `0x38008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB25_RESUME` `0x39008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB26_RESUME` `0x3A008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB27_RESUME` `0x3B008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB28_RESUME` `0x3C008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB29_RESUME` `0x3D008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB30_RESUME` `0x3E008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB31_RESUME` `0x3F008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`TnR` `WO 0x0`
`SMMU_CB0_TCR2` `0x20010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB1_TCR2` `0x21010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB2_TCR2` `0x22010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB3_TCR2` `0x23010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB4_TCR2` `0x24010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB5_TCR2` `0x25010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB6_TCR2` `0x26010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB7_TCR2` `0x27010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB8_TCR2` `0x28010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB9_TCR2` `0x29010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB10_TCR2` `0x2A010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB11_TCR2` `0x2B010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB12_TCR2` `0x2C010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB13_TCR2` `0x2D010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB14_TCR2` `0x2E010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB15_TCR2` `0x2F010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB16_TCR2` `0x30010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB17_TCR2` `0x31010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB18_TCR2` `0x32010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB19_TCR2` `0x33010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB20_TCR2` `0x34010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB21_TCR2` `0x35010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB22_TCR2` `0x36010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB23_TCR2` `0x37010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB24_TCR2` `0x38010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB25_TCR2` `0x39010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB26_TCR2` `0x3A010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB27_TCR2` `0x3B010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB28_TCR2` `0x3C010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB29_TCR2` `0x3D010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB30_TCR2` `0x3E010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB31_TCR2` `0x3F010` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`NSCFG1` `RW 0x0`	`Reserved`												`SEP` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SEP` `RW 0x0`	`NSCFG0` `RW 0x0`	`Reserved`							`TBI1` `RO 0x1`	`TBI0` `RO 0x1`	`AS` `RW 0x0`	`Reserved`	`PASize` `RW 0x0`
`SMMU_CB0_TTBR0_low` `0x20020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB1_TTBR0_low` `0x21020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB2_TTBR0_low` `0x22020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB3_TTBR0_low` `0x23020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB4_TTBR0_low` `0x24020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB5_TTBR0_low` `0x25020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB6_TTBR0_low` `0x26020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB7_TTBR0_low` `0x27020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB8_TTBR0_low` `0x28020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB9_TTBR0_low` `0x29020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB10_TTBR0_low` `0x2A020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB11_TTBR0_low` `0x2B020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB12_TTBR0_low` `0x2C020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB13_TTBR0_low` `0x2D020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB14_TTBR0_low` `0x2E020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB15_TTBR0_low` `0x2F020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB16_TTBR0_low` `0x30020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB17_TTBR0_low` `0x31020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB18_TTBR0_low` `0x32020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB19_TTBR0_low` `0x33020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB20_TTBR0_low` `0x34020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB21_TTBR0_low` `0x35020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB22_TTBR0_low` `0x36020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB23_TTBR0_low` `0x37020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB24_TTBR0_low` `0x38020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB25_TTBR0_low` `0x39020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB26_TTBR0_low` `0x3A020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB27_TTBR0_low` `0x3B020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB28_TTBR0_low` `0x3C020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB29_TTBR0_low` `0x3D020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB30_TTBR0_low` `0x3E020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB31_TTBR0_low` `0x3F020` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RO 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB0_TTBR0_high` `0x20024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB1_TTBR0_high` `0x21024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB2_TTBR0_high` `0x22024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB3_TTBR0_high` `0x23024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB4_TTBR0_high` `0x24024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB5_TTBR0_high` `0x25024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB6_TTBR0_high` `0x26024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB7_TTBR0_high` `0x27024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB8_TTBR0_high` `0x28024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB9_TTBR0_high` `0x29024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB10_TTBR0_high` `0x2A024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB11_TTBR0_high` `0x2B024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB12_TTBR0_high` `0x2C024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB13_TTBR0_high` `0x2D024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB14_TTBR0_high` `0x2E024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB15_TTBR0_high` `0x2F024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB16_TTBR0_high` `0x30024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB17_TTBR0_high` `0x31024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB18_TTBR0_high` `0x32024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB19_TTBR0_high` `0x33024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB20_TTBR0_high` `0x34024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB21_TTBR0_high` `0x35024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB22_TTBR0_high` `0x36024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB23_TTBR0_high` `0x37024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB24_TTBR0_high` `0x38024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB25_TTBR0_high` `0x39024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB26_TTBR0_high` `0x3A024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB27_TTBR0_high` `0x3B024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB28_TTBR0_high` `0x3C024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB29_TTBR0_high` `0x3D024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB30_TTBR0_high` `0x3E024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB31_TTBR0_high` `0x3F024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB0_TTBR1_low` `0x20028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB1_TTBR1_low` `0x21028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB2_TTBR1_low` `0x22028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB3_TTBR1_low` `0x23028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB4_TTBR1_low` `0x24028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB5_TTBR1_low` `0x25028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB6_TTBR1_low` `0x26028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB7_TTBR1_low` `0x27028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB8_TTBR1_low` `0x28028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB9_TTBR1_low` `0x29028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB10_TTBR1_low` `0x2A028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB11_TTBR1_low` `0x2B028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB12_TTBR1_low` `0x2C028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB13_TTBR1_low` `0x2D028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB14_TTBR1_low` `0x2E028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB15_TTBR1_low` `0x2F028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB16_TTBR1_low` `0x30028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB17_TTBR1_low` `0x31028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB18_TTBR1_low` `0x32028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB19_TTBR1_low` `0x33028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB20_TTBR1_low` `0x34028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB21_TTBR1_low` `0x35028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB22_TTBR1_low` `0x36028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB23_TTBR1_low` `0x37028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB24_TTBR1_low` `0x38028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB25_TTBR1_low` `0x39028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB26_TTBR1_low` `0x3A028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB27_TTBR1_low` `0x3B028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB28_TTBR1_low` `0x3C028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB29_TTBR1_low` `0x3D028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB30_TTBR1_low` `0x3E028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB31_TTBR1_low` `0x3F028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDRESS_31_7` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDRESS_31_7` `RW 0x0`									`ADDRESS_6_IRGN0` `RW 0x0`	`ADDRESS_5_NOS` `RW 0x0`	`ADDRESS_4_3_RGN` `RW 0x0`		`ADDRESS_2` `RW 0x0`	`ADDRESS_1_S` `RW 0x0`	`ADDRESS_0_IRGN1` `RW 0x0`
`SMMU_CB0_TTBR1_high` `0x2002C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB1_TTBR1_high` `0x2102C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB2_TTBR1_high` `0x2202C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB3_TTBR1_high` `0x2302C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB4_TTBR1_high` `0x2402C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB5_TTBR1_high` `0x2502C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB6_TTBR1_high` `0x2602C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB7_TTBR1_high` `0x2702C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB8_TTBR1_high` `0x2802C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB9_TTBR1_high` `0x2902C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB10_TTBR1_high` `0x2A02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB11_TTBR1_high` `0x2B02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB12_TTBR1_high` `0x2C02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB13_TTBR1_high` `0x2D02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB14_TTBR1_high` `0x2E02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB15_TTBR1_high` `0x2F02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB16_TTBR1_high` `0x3002C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB17_TTBR1_high` `0x3102C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB18_TTBR1_high` `0x3202C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB19_TTBR1_high` `0x3302C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB20_TTBR1_high` `0x3402C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB21_TTBR1_high` `0x3502C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB22_TTBR1_high` `0x3602C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB23_TTBR1_high` `0x3702C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB24_TTBR1_high` `0x3802C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB25_TTBR1_high` `0x3902C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB26_TTBR1_high` `0x3A02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB27_TTBR1_high` `0x3B02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB28_TTBR1_high` `0x3C02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB29_TTBR1_high` `0x3D02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB30_TTBR1_high` `0x3E02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB31_TTBR1_high` `0x3F02C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`address` `RW 0x0`
`SMMU_CB0_TCR_lpae` `0x20030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB1_TCR_lpae` `0x21030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB2_TCR_lpae` `0x22030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB3_TCR_lpae` `0x23030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB4_TCR_lpae` `0x24030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB5_TCR_lpae` `0x25030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB6_TCR_lpae` `0x26030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB7_TCR_lpae` `0x27030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB8_TCR_lpae` `0x28030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB9_TCR_lpae` `0x29030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB10_TCR_lpae` `0x2A030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB11_TCR_lpae` `0x2B030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB12_TCR_lpae` `0x2C030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB13_TCR_lpae` `0x2D030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB14_TCR_lpae` `0x2E030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB15_TCR_lpae` `0x2F030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB16_TCR_lpae` `0x30030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB17_TCR_lpae` `0x31030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB18_TCR_lpae` `0x32030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB19_TCR_lpae` `0x33030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB20_TCR_lpae` `0x34030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB21_TCR_lpae` `0x35030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB22_TCR_lpae` `0x36030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB23_TCR_lpae` `0x37030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB24_TCR_lpae` `0x38030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB25_TCR_lpae` `0x39030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB26_TCR_lpae` `0x3A030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB27_TCR_lpae` `0x3B030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB28_TCR_lpae` `0x3C030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB29_TCR_lpae` `0x3D030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB30_TCR_lpae` `0x3E030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB31_TCR_lpae` `0x3F030` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EAE` `RW 0x0`	`NSCFG1_TG1` `RW 0x0`	`SH1` `RW 0x0`		`ORGN1` `RW 0x0`		`IRGN1` `RW 0x0`		`EPD1` `RW 0x0`	`A1` `RW 0x0`	`T1SZ_5_3` `RW 0x0`			`T1SZ_2_0_PASIZE` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`NSCFG0_TG0` `RW 0x0`	`SH0` `RW 0x0`		`ORGN0` `RW 0x0`		`IRGN0` `RW 0x0`		`SL0_1_EPD0` `RW 0x0`	`SL0_0` `RW 0x0`	`PD1_T0SZ_5` `RW 0x0`	`S_PD0_T0SZ_4` `RW 0x0`	`T0SZ_3_0` `RW 0x0`
`SMMU_CB0_CONTEXTIDR` `0x20034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB1_CONTEXTIDR` `0x21034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB2_CONTEXTIDR` `0x22034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB3_CONTEXTIDR` `0x23034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB4_CONTEXTIDR` `0x24034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB5_CONTEXTIDR` `0x25034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB6_CONTEXTIDR` `0x26034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB7_CONTEXTIDR` `0x27034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB8_CONTEXTIDR` `0x28034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB9_CONTEXTIDR` `0x29034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB10_CONTEXTIDR` `0x2A034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB11_CONTEXTIDR` `0x2B034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB12_CONTEXTIDR` `0x2C034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB13_CONTEXTIDR` `0x2D034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB14_CONTEXTIDR` `0x2E034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB15_CONTEXTIDR` `0x2F034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB16_CONTEXTIDR` `0x30034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB17_CONTEXTIDR` `0x31034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB18_CONTEXTIDR` `0x32034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB19_CONTEXTIDR` `0x33034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB20_CONTEXTIDR` `0x34034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB21_CONTEXTIDR` `0x35034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB22_CONTEXTIDR` `0x36034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB23_CONTEXTIDR` `0x37034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB24_CONTEXTIDR` `0x38034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB25_CONTEXTIDR` `0x39034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB26_CONTEXTIDR` `0x3A034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB27_CONTEXTIDR` `0x3B034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB28_CONTEXTIDR` `0x3C034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB29_CONTEXTIDR` `0x3D034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB30_CONTEXTIDR` `0x3E034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB31_CONTEXTIDR` `0x3F034` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PROCID` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PROCID` `RW 0x0`								`ASID` `RW 0x0`
`SMMU_CB0_PRRR_MAIR0` `0x20038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB1_PRRR_MAIR0` `0x21038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB2_PRRR_MAIR0` `0x22038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB3_PRRR_MAIR0` `0x23038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB4_PRRR_MAIR0` `0x24038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB5_PRRR_MAIR0` `0x25038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB6_PRRR_MAIR0` `0x26038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB7_PRRR_MAIR0` `0x27038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB8_PRRR_MAIR0` `0x28038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB9_PRRR_MAIR0` `0x29038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB10_PRRR_MAIR0` `0x2A038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB11_PRRR_MAIR0` `0x2B038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB12_PRRR_MAIR0` `0x2C038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB13_PRRR_MAIR0` `0x2D038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB14_PRRR_MAIR0` `0x2E038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB15_PRRR_MAIR0` `0x2F038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB16_PRRR_MAIR0` `0x30038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB17_PRRR_MAIR0` `0x31038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB18_PRRR_MAIR0` `0x32038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB19_PRRR_MAIR0` `0x33038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB20_PRRR_MAIR0` `0x34038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB21_PRRR_MAIR0` `0x35038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB22_PRRR_MAIR0` `0x36038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB23_PRRR_MAIR0` `0x37038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB24_PRRR_MAIR0` `0x38038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB25_PRRR_MAIR0` `0x39038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB26_PRRR_MAIR0` `0x3A038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB27_PRRR_MAIR0` `0x3B038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB28_PRRR_MAIR0` `0x3C038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB29_PRRR_MAIR0` `0x3D038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB30_PRRR_MAIR0` `0x3E038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB31_PRRR_MAIR0` `0x3F038` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NOS7` `RW 0x0`	`NOS6` `RW 0x0`	`NOS5` `RW 0x0`	`NOS4` `RW 0x0`	`NOS3` `RW 0x0`	`NOS2` `RW 0x0`	`NOS1` `RW 0x0`	`NOS0` `RW 0x0`	`Reserved`				`NS1` `RW 0x0`	`NS0` `RW 0x0`	`DS1` `RW 0x0`	`DS0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`TR7` `RW 0x0`		`TR6` `RW 0x0`		`TR5` `RW 0x0`		`TR4` `RW 0x0`		`TR3` `RW 0x0`		`TR2` `RW 0x0`		`TR1` `RW 0x0`		`TR0` `RW 0x0`
`SMMU_CB0_NMRR_MAIR1` `0x2003C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB1_NMRR_MAIR1` `0x2103C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB2_NMRR_MAIR1` `0x2203C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB3_NMRR_MAIR1` `0x2303C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB4_NMRR_MAIR1` `0x2403C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB5_NMRR_MAIR1` `0x2503C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB6_NMRR_MAIR1` `0x2603C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB7_NMRR_MAIR1` `0x2703C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB8_NMRR_MAIR1` `0x2803C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB9_NMRR_MAIR1` `0x2903C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB10_NMRR_MAIR1` `0x2A03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB11_NMRR_MAIR1` `0x2B03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB12_NMRR_MAIR1` `0x2C03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB13_NMRR_MAIR1` `0x2D03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB14_NMRR_MAIR1` `0x2E03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB15_NMRR_MAIR1` `0x2F03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB16_NMRR_MAIR1` `0x3003C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB17_NMRR_MAIR1` `0x3103C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB18_NMRR_MAIR1` `0x3203C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB19_NMRR_MAIR1` `0x3303C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB20_NMRR_MAIR1` `0x3403C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB21_NMRR_MAIR1` `0x3503C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB22_NMRR_MAIR1` `0x3603C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB23_NMRR_MAIR1` `0x3703C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB24_NMRR_MAIR1` `0x3803C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB25_NMRR_MAIR1` `0x3903C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB26_NMRR_MAIR1` `0x3A03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB27_NMRR_MAIR1` `0x3B03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB28_NMRR_MAIR1` `0x3C03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB29_NMRR_MAIR1` `0x3D03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB30_NMRR_MAIR1` `0x3E03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB31_NMRR_MAIR1` `0x3F03C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OR7` `RW 0x0`		`OR6` `RW 0x0`		`OR5` `RW 0x0`		`OR4` `RW 0x0`		`OR3` `RW 0x0`		`OR2` `RW 0x0`		`OR1` `RW 0x0`		`OR0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IR7` `RW 0x0`		`IR6` `RW 0x0`		`IR5` `RW 0x0`		`IR4` `RW 0x0`		`IR3` `RW 0x0`		`IR2` `RW 0x0`		`IR1` `RW 0x0`		`IR0` `RW 0x0`
`SMMU_CB0_FSR` `0x20058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB1_FSR` `0x21058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB2_FSR` `0x22058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB3_FSR` `0x23058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB4_FSR` `0x24058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB5_FSR` `0x25058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB6_FSR` `0x26058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB7_FSR` `0x27058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB8_FSR` `0x28058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB9_FSR` `0x29058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB10_FSR` `0x2A058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB11_FSR` `0x2B058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB12_FSR` `0x2C058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB13_FSR` `0x2D058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB14_FSR` `0x2E058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB15_FSR` `0x2F058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB16_FSR` `0x30058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB17_FSR` `0x31058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB18_FSR` `0x32058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB19_FSR` `0x33058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB20_FSR` `0x34058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB21_FSR` `0x35058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB22_FSR` `0x36058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB23_FSR` `0x37058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB24_FSR` `0x38058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB25_FSR` `0x39058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB26_FSR` `0x3A058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB27_FSR` `0x3B058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB28_FSR` `0x3C058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB29_FSR` `0x3D058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB30_FSR` `0x3E058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB31_FSR` `0x3F058` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MULTI` `WO 0x0`	`SS` `WO 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`Format` `WO 0x0`		`UUT` `WO 0x0`	`ASF` `WO 0x0`	`TLBLKF` `WO 0x0`	`TLBMCF` `WO 0x0`	`EF` `WO 0x0`	`PF` `WO 0x0`	`AFF` `WO 0x0`	`TF` `WO 0x0`	`Reserved`
`SMMU_CB0_FSRRESTORE` `0x2005C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB1_FSRRESTORE` `0x2105C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB2_FSRRESTORE` `0x2205C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB3_FSRRESTORE` `0x2305C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB4_FSRRESTORE` `0x2405C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB5_FSRRESTORE` `0x2505C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB6_FSRRESTORE` `0x2605C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB7_FSRRESTORE` `0x2705C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB8_FSRRESTORE` `0x2805C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB9_FSRRESTORE` `0x2905C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB10_FSRRESTORE` `0x2A05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB11_FSRRESTORE` `0x2B05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB12_FSRRESTORE` `0x2C05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB13_FSRRESTORE` `0x2D05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB14_FSRRESTORE` `0x2E05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB15_FSRRESTORE` `0x2F05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB16_FSRRESTORE` `0x3005C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB17_FSRRESTORE` `0x3105C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB18_FSRRESTORE` `0x3205C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB19_FSRRESTORE` `0x3305C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB20_FSRRESTORE` `0x3405C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB21_FSRRESTORE` `0x3505C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB22_FSRRESTORE` `0x3605C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB23_FSRRESTORE` `0x3705C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB24_FSRRESTORE` `0x3805C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB25_FSRRESTORE` `0x3905C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB26_FSRRESTORE` `0x3A05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB27_FSRRESTORE` `0x3B05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB28_FSRRESTORE` `0x3C05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB29_FSRRESTORE` `0x3D05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB30_FSRRESTORE` `0x3E05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB31_FSRRESTORE` `0x3F05C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB0_FAR_low` `0x20060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB1_FAR_low` `0x21060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB2_FAR_low` `0x22060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB3_FAR_low` `0x23060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB4_FAR_low` `0x24060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB5_FAR_low` `0x25060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB6_FAR_low` `0x26060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB7_FAR_low` `0x27060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB8_FAR_low` `0x28060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB9_FAR_low` `0x29060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB10_FAR_low` `0x2A060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB11_FAR_low` `0x2B060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB12_FAR_low` `0x2C060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB13_FAR_low` `0x2D060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB14_FAR_low` `0x2E060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB15_FAR_low` `0x2F060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB16_FAR_low` `0x30060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB17_FAR_low` `0x31060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB18_FAR_low` `0x32060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB19_FAR_low` `0x33060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB20_FAR_low` `0x34060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB21_FAR_low` `0x35060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB22_FAR_low` `0x36060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB23_FAR_low` `0x37060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB24_FAR_low` `0x38060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB25_FAR_low` `0x39060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB26_FAR_low` `0x3A060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB27_FAR_low` `0x3B060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB28_FAR_low` `0x3C060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB29_FAR_low` `0x3D060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB30_FAR_low` `0x3E060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB31_FAR_low` `0x3F060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB0_FAR_high` `0x20064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB1_FAR_high` `0x21064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB2_FAR_high` `0x22064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB3_FAR_high` `0x23064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB4_FAR_high` `0x24064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB5_FAR_high` `0x25064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB6_FAR_high` `0x26064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB7_FAR_high` `0x27064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB8_FAR_high` `0x28064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB9_FAR_high` `0x29064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB10_FAR_high` `0x2A064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB11_FAR_high` `0x2B064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB12_FAR_high` `0x2C064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB13_FAR_high` `0x2D064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB14_FAR_high` `0x2E064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB15_FAR_high` `0x2F064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB16_FAR_high` `0x30064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB17_FAR_high` `0x31064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB18_FAR_high` `0x32064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB19_FAR_high` `0x33064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB20_FAR_high` `0x34064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB21_FAR_high` `0x35064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB22_FAR_high` `0x36064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB23_FAR_high` `0x37064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB24_FAR_high` `0x38064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB25_FAR_high` `0x39064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB26_FAR_high` `0x3A064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB27_FAR_high` `0x3B064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB28_FAR_high` `0x3C064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB29_FAR_high` `0x3D064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB30_FAR_high` `0x3E064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB31_FAR_high` `0x3F064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB0_FSYNR0` `0x20068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB1_FSYNR0` `0x21068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB2_FSYNR0` `0x22068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB3_FSYNR0` `0x23068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB4_FSYNR0` `0x24068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB5_FSYNR0` `0x25068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB6_FSYNR0` `0x26068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB7_FSYNR0` `0x27068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB8_FSYNR0` `0x28068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB9_FSYNR0` `0x29068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB10_FSYNR0` `0x2A068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB11_FSYNR0` `0x2B068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB12_FSYNR0` `0x2C068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB13_FSYNR0` `0x2D068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB14_FSYNR0` `0x2E068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB15_FSYNR0` `0x2F068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB16_FSYNR0` `0x30068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB17_FSYNR0` `0x31068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB18_FSYNR0` `0x32068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB19_FSYNR0` `0x33068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB20_FSYNR0` `0x34068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB21_FSYNR0` `0x35068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB22_FSYNR0` `0x36068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB23_FSYNR0` `0x37068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB24_FSYNR0` `0x38068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB25_FSYNR0` `0x39068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB26_FSYNR0` `0x3A068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB27_FSYNR0` `0x3B068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB28_FSYNR0` `0x3C068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB29_FSYNR0` `0x3D068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB30_FSYNR0` `0x3E068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB31_FSYNR0` `0x3F068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`S1CBNDX` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`AFR` `RW 0x0`	`PTWF` `RW 0x0`	`ATOF` `RO 0x0`	`NSATTR` `RW 0x0`	`Reserved`	`IND` `RW 0x0`	`PNU` `RW 0x0`	`WNR` `RW 0x0`	`Reserved`		`PLVL` `RW 0x0`
`SMMU_CB0_IPAFAR_low` `0x20070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB1_IPAFAR_low` `0x21070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB2_IPAFAR_low` `0x22070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB3_IPAFAR_low` `0x23070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB4_IPAFAR_low` `0x24070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB5_IPAFAR_low` `0x25070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB6_IPAFAR_low` `0x26070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB7_IPAFAR_low` `0x27070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB8_IPAFAR_low` `0x28070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB9_IPAFAR_low` `0x29070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB10_IPAFAR_low` `0x2A070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB11_IPAFAR_low` `0x2B070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB12_IPAFAR_low` `0x2C070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB13_IPAFAR_low` `0x2D070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB14_IPAFAR_low` `0x2E070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB15_IPAFAR_low` `0x2F070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB16_IPAFAR_low` `0x30070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB17_IPAFAR_low` `0x31070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB18_IPAFAR_low` `0x32070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB19_IPAFAR_low` `0x33070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB20_IPAFAR_low` `0x34070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB21_IPAFAR_low` `0x35070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB22_IPAFAR_low` `0x36070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB23_IPAFAR_low` `0x37070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB24_IPAFAR_low` `0x38070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB25_IPAFAR_low` `0x39070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB26_IPAFAR_low` `0x3A070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB27_IPAFAR_low` `0x3B070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB28_IPAFAR_low` `0x3C070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB29_IPAFAR_low` `0x3D070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB30_IPAFAR_low` `0x3E070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB31_IPAFAR_low` `0x3F070` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ipafar_l` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ipafar_l` `RW 0x0`				`far_ro` `RO 0x0`
`SMMU_CB0_IPAFAR_high` `0x20074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB1_IPAFAR_high` `0x21074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB2_IPAFAR_high` `0x22074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB3_IPAFAR_high` `0x23074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB4_IPAFAR_high` `0x24074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB5_IPAFAR_high` `0x25074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB6_IPAFAR_high` `0x26074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB7_IPAFAR_high` `0x27074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB8_IPAFAR_high` `0x28074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB9_IPAFAR_high` `0x29074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB10_IPAFAR_high` `0x2A074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB11_IPAFAR_high` `0x2B074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB12_IPAFAR_high` `0x2C074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB13_IPAFAR_high` `0x2D074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB14_IPAFAR_high` `0x2E074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB15_IPAFAR_high` `0x2F074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB16_IPAFAR_high` `0x30074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB17_IPAFAR_high` `0x31074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB18_IPAFAR_high` `0x32074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB19_IPAFAR_high` `0x33074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB20_IPAFAR_high` `0x34074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB21_IPAFAR_high` `0x35074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB22_IPAFAR_high` `0x36074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB23_IPAFAR_high` `0x37074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB24_IPAFAR_high` `0x38074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB25_IPAFAR_high` `0x39074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB26_IPAFAR_high` `0x3A074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB27_IPAFAR_high` `0x3B074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB28_IPAFAR_high` `0x3C074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB29_IPAFAR_high` `0x3D074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB30_IPAFAR_high` `0x3E074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB31_IPAFAR_high` `0x3F074` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB0_TLBIVA_low` `0x20600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB1_TLBIVA_low` `0x21600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB2_TLBIVA_low` `0x22600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB3_TLBIVA_low` `0x23600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB4_TLBIVA_low` `0x24600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB5_TLBIVA_low` `0x25600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB6_TLBIVA_low` `0x26600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB7_TLBIVA_low` `0x27600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB8_TLBIVA_low` `0x28600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB9_TLBIVA_low` `0x29600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB10_TLBIVA_low` `0x2A600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB11_TLBIVA_low` `0x2B600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB12_TLBIVA_low` `0x2C600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB13_TLBIVA_low` `0x2D600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB14_TLBIVA_low` `0x2E600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB15_TLBIVA_low` `0x2F600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB16_TLBIVA_low` `0x30600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB17_TLBIVA_low` `0x31600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB18_TLBIVA_low` `0x32600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB19_TLBIVA_low` `0x33600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB20_TLBIVA_low` `0x34600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB21_TLBIVA_low` `0x35600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB22_TLBIVA_low` `0x36600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB23_TLBIVA_low` `0x37600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB24_TLBIVA_low` `0x38600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB25_TLBIVA_low` `0x39600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB26_TLBIVA_low` `0x3A600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB27_TLBIVA_low` `0x3B600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB28_TLBIVA_low` `0x3C600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB29_TLBIVA_low` `0x3D600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB30_TLBIVA_low` `0x3E600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB31_TLBIVA_low` `0x3F600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB0_TLBIVA_high` `0x20604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB1_TLBIVA_high` `0x21604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB2_TLBIVA_high` `0x22604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB3_TLBIVA_high` `0x23604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB4_TLBIVA_high` `0x24604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB5_TLBIVA_high` `0x25604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB6_TLBIVA_high` `0x26604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB7_TLBIVA_high` `0x27604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB8_TLBIVA_high` `0x28604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB9_TLBIVA_high` `0x29604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB10_TLBIVA_high` `0x2A604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB11_TLBIVA_high` `0x2B604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB12_TLBIVA_high` `0x2C604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB13_TLBIVA_high` `0x2D604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB14_TLBIVA_high` `0x2E604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB15_TLBIVA_high` `0x2F604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB16_TLBIVA_high` `0x30604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB17_TLBIVA_high` `0x31604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB18_TLBIVA_high` `0x32604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB19_TLBIVA_high` `0x33604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB20_TLBIVA_high` `0x34604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB21_TLBIVA_high` `0x35604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB22_TLBIVA_high` `0x36604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB23_TLBIVA_high` `0x37604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB24_TLBIVA_high` `0x38604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB25_TLBIVA_high` `0x39604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB26_TLBIVA_high` `0x3A604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB27_TLBIVA_high` `0x3B604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB28_TLBIVA_high` `0x3C604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB29_TLBIVA_high` `0x3D604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB30_TLBIVA_high` `0x3E604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB31_TLBIVA_high` `0x3F604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB0_TLBIVAA_low` `0x20608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB1_TLBIVAA_low` `0x21608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB2_TLBIVAA_low` `0x22608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB3_TLBIVAA_low` `0x23608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB4_TLBIVAA_low` `0x24608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB5_TLBIVAA_low` `0x25608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB6_TLBIVAA_low` `0x26608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB7_TLBIVAA_low` `0x27608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB8_TLBIVAA_low` `0x28608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB9_TLBIVAA_low` `0x29608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB10_TLBIVAA_low` `0x2A608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB11_TLBIVAA_low` `0x2B608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB12_TLBIVAA_low` `0x2C608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB13_TLBIVAA_low` `0x2D608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB14_TLBIVAA_low` `0x2E608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB15_TLBIVAA_low` `0x2F608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB16_TLBIVAA_low` `0x30608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB17_TLBIVAA_low` `0x31608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB18_TLBIVAA_low` `0x32608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB19_TLBIVAA_low` `0x33608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB20_TLBIVAA_low` `0x34608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB21_TLBIVAA_low` `0x35608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB22_TLBIVAA_low` `0x36608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB23_TLBIVAA_low` `0x37608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB24_TLBIVAA_low` `0x38608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB25_TLBIVAA_low` `0x39608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB26_TLBIVAA_low` `0x3A608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB27_TLBIVAA_low` `0x3B608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB28_TLBIVAA_low` `0x3C608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB29_TLBIVAA_low` `0x3D608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB30_TLBIVAA_low` `0x3E608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB31_TLBIVAA_low` `0x3F608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB0_TLBIVAA_high` `0x2060C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB1_TLBIVAA_high` `0x2160C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB2_TLBIVAA_high` `0x2260C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB3_TLBIVAA_high` `0x2360C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB4_TLBIVAA_high` `0x2460C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB5_TLBIVAA_high` `0x2560C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB6_TLBIVAA_high` `0x2660C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB7_TLBIVAA_high` `0x2760C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB8_TLBIVAA_high` `0x2860C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB9_TLBIVAA_high` `0x2960C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB10_TLBIVAA_high` `0x2A60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB11_TLBIVAA_high` `0x2B60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB12_TLBIVAA_high` `0x2C60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB13_TLBIVAA_high` `0x2D60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB14_TLBIVAA_high` `0x2E60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB15_TLBIVAA_high` `0x2F60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB16_TLBIVAA_high` `0x3060C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB17_TLBIVAA_high` `0x3160C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB18_TLBIVAA_high` `0x3260C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB19_TLBIVAA_high` `0x3360C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB20_TLBIVAA_high` `0x3460C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB21_TLBIVAA_high` `0x3560C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB22_TLBIVAA_high` `0x3660C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB23_TLBIVAA_high` `0x3760C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB24_TLBIVAA_high` `0x3860C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB25_TLBIVAA_high` `0x3960C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB26_TLBIVAA_high` `0x3A60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB27_TLBIVAA_high` `0x3B60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB28_TLBIVAA_high` `0x3C60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB29_TLBIVAA_high` `0x3D60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB30_TLBIVAA_high` `0x3E60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB31_TLBIVAA_high` `0x3F60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB0_TLBIASID` `0x20610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB1_TLBIASID` `0x21610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB2_TLBIASID` `0x22610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB3_TLBIASID` `0x23610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB4_TLBIASID` `0x24610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB5_TLBIASID` `0x25610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB6_TLBIASID` `0x26610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB7_TLBIASID` `0x27610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB8_TLBIASID` `0x28610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB9_TLBIASID` `0x29610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB10_TLBIASID` `0x2A610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB11_TLBIASID` `0x2B610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB12_TLBIASID` `0x2C610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB13_TLBIASID` `0x2D610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB14_TLBIASID` `0x2E610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB15_TLBIASID` `0x2F610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB16_TLBIASID` `0x30610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB17_TLBIASID` `0x31610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB18_TLBIASID` `0x32610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB19_TLBIASID` `0x33610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB20_TLBIASID` `0x34610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB21_TLBIASID` `0x35610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB22_TLBIASID` `0x36610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB23_TLBIASID` `0x37610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB24_TLBIASID` `0x38610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB25_TLBIASID` `0x39610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB26_TLBIASID` `0x3A610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB27_TLBIASID` `0x3B610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB28_TLBIASID` `0x3C610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB29_TLBIASID` `0x3D610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB30_TLBIASID` `0x3E610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB31_TLBIASID` `0x3F610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ASID` `WO 0x0`
`SMMU_CB0_TLBIALL` `0x20618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB1_TLBIALL` `0x21618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB2_TLBIALL` `0x22618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB3_TLBIALL` `0x23618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB4_TLBIALL` `0x24618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB5_TLBIALL` `0x25618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB6_TLBIALL` `0x26618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB7_TLBIALL` `0x27618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB8_TLBIALL` `0x28618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB9_TLBIALL` `0x29618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB10_TLBIALL` `0x2A618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB11_TLBIALL` `0x2B618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB12_TLBIALL` `0x2C618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB13_TLBIALL` `0x2D618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB14_TLBIALL` `0x2E618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB15_TLBIALL` `0x2F618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB16_TLBIALL` `0x30618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB17_TLBIALL` `0x31618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB18_TLBIALL` `0x32618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB19_TLBIALL` `0x33618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB20_TLBIALL` `0x34618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB21_TLBIALL` `0x35618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB22_TLBIALL` `0x36618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB23_TLBIALL` `0x37618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB24_TLBIALL` `0x38618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB25_TLBIALL` `0x39618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB26_TLBIALL` `0x3A618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB27_TLBIALL` `0x3B618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB28_TLBIALL` `0x3C618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB29_TLBIALL` `0x3D618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB30_TLBIALL` `0x3E618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB31_TLBIALL` `0x3F618` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB0_TLBIVAL_low` `0x20620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB1_TLBIVAL_low` `0x21620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB2_TLBIVAL_low` `0x22620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB3_TLBIVAL_low` `0x23620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB4_TLBIVAL_low` `0x24620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB5_TLBIVAL_low` `0x25620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB6_TLBIVAL_low` `0x26620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB7_TLBIVAL_low` `0x27620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB8_TLBIVAL_low` `0x28620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB9_TLBIVAL_low` `0x29620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB10_TLBIVAL_low` `0x2A620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB11_TLBIVAL_low` `0x2B620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB12_TLBIVAL_low` `0x2C620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB13_TLBIVAL_low` `0x2D620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB14_TLBIVAL_low` `0x2E620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB15_TLBIVAL_low` `0x2F620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB16_TLBIVAL_low` `0x30620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB17_TLBIVAL_low` `0x31620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB18_TLBIVAL_low` `0x32620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB19_TLBIVAL_low` `0x33620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB20_TLBIVAL_low` `0x34620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB21_TLBIVAL_low` `0x35620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB22_TLBIVAL_low` `0x36620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB23_TLBIVAL_low` `0x37620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB24_TLBIVAL_low` `0x38620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB25_TLBIVAL_low` `0x39620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB26_TLBIVAL_low` `0x3A620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB27_TLBIVAL_low` `0x3B620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB28_TLBIVAL_low` `0x3C620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB29_TLBIVAL_low` `0x3D620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB30_TLBIVAL_low` `0x3E620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB31_TLBIVAL_low` `0x3F620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB0_TLBIVAL_high` `0x20624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB1_TLBIVAL_high` `0x21624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB2_TLBIVAL_high` `0x22624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB3_TLBIVAL_high` `0x23624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB4_TLBIVAL_high` `0x24624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB5_TLBIVAL_high` `0x25624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB6_TLBIVAL_high` `0x26624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB7_TLBIVAL_high` `0x27624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB8_TLBIVAL_high` `0x28624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB9_TLBIVAL_high` `0x29624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB10_TLBIVAL_high` `0x2A624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB11_TLBIVAL_high` `0x2B624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB12_TLBIVAL_high` `0x2C624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB13_TLBIVAL_high` `0x2D624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB14_TLBIVAL_high` `0x2E624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB15_TLBIVAL_high` `0x2F624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB16_TLBIVAL_high` `0x30624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB17_TLBIVAL_high` `0x31624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB18_TLBIVAL_high` `0x32624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB19_TLBIVAL_high` `0x33624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB20_TLBIVAL_high` `0x34624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB21_TLBIVAL_high` `0x35624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB22_TLBIVAL_high` `0x36624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB23_TLBIVAL_high` `0x37624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB24_TLBIVAL_high` `0x38624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB25_TLBIVAL_high` `0x39624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB26_TLBIVAL_high` `0x3A624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB27_TLBIVAL_high` `0x3B624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB28_TLBIVAL_high` `0x3C624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB29_TLBIVAL_high` `0x3D624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB30_TLBIVAL_high` `0x3E624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB31_TLBIVAL_high` `0x3F624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB0_TLBIVAAL_low` `0x20628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB1_TLBIVAAL_low` `0x21628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB2_TLBIVAAL_low` `0x22628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB3_TLBIVAAL_low` `0x23628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB4_TLBIVAAL_low` `0x24628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB5_TLBIVAAL_low` `0x25628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB6_TLBIVAAL_low` `0x26628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB7_TLBIVAAL_low` `0x27628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB8_TLBIVAAL_low` `0x28628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB9_TLBIVAAL_low` `0x29628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB10_TLBIVAAL_low` `0x2A628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB11_TLBIVAAL_low` `0x2B628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB12_TLBIVAAL_low` `0x2C628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB13_TLBIVAAL_low` `0x2D628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB14_TLBIVAAL_low` `0x2E628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB15_TLBIVAAL_low` `0x2F628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB16_TLBIVAAL_low` `0x30628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB17_TLBIVAAL_low` `0x31628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB18_TLBIVAAL_low` `0x32628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB19_TLBIVAAL_low` `0x33628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB20_TLBIVAAL_low` `0x34628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB21_TLBIVAAL_low` `0x35628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB22_TLBIVAAL_low` `0x36628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB23_TLBIVAAL_low` `0x37628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB24_TLBIVAAL_low` `0x38628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB25_TLBIVAAL_low` `0x39628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB26_TLBIVAAL_low` `0x3A628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB27_TLBIVAAL_low` `0x3B628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB28_TLBIVAAL_low` `0x3C628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB29_TLBIVAAL_low` `0x3D628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB30_TLBIVAAL_low` `0x3E628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB31_TLBIVAAL_low` `0x3F628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB0_TLBIVAAL_high` `0x2062C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB1_TLBIVAAL_high` `0x2162C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB2_TLBIVAAL_high` `0x2262C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB3_TLBIVAAL_high` `0x2362C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB4_TLBIVAAL_high` `0x2462C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB5_TLBIVAAL_high` `0x2562C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB6_TLBIVAAL_high` `0x2662C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB7_TLBIVAAL_high` `0x2762C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB8_TLBIVAAL_high` `0x2862C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB9_TLBIVAAL_high` `0x2962C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB10_TLBIVAAL_high` `0x2A62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB11_TLBIVAAL_high` `0x2B62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB12_TLBIVAAL_high` `0x2C62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB13_TLBIVAAL_high` `0x2D62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB14_TLBIVAAL_high` `0x2E62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB15_TLBIVAAL_high` `0x2F62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB16_TLBIVAAL_high` `0x3062C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB17_TLBIVAAL_high` `0x3162C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB18_TLBIVAAL_high` `0x3262C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB19_TLBIVAAL_high` `0x3362C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB20_TLBIVAAL_high` `0x3462C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB21_TLBIVAAL_high` `0x3562C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB22_TLBIVAAL_high` `0x3662C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB23_TLBIVAAL_high` `0x3762C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB24_TLBIVAAL_high` `0x3862C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB25_TLBIVAAL_high` `0x3962C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB26_TLBIVAAL_high` `0x3A62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB27_TLBIVAAL_high` `0x3B62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB28_TLBIVAAL_high` `0x3C62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB29_TLBIVAAL_high` `0x3D62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB30_TLBIVAAL_high` `0x3E62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB31_TLBIVAAL_high` `0x3F62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ASID` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`Address` `WO 0x0`
`SMMU_CB0_TLBIIPAS2_low` `0x20630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB1_TLBIIPAS2_low` `0x21630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB2_TLBIIPAS2_low` `0x22630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB3_TLBIIPAS2_low` `0x23630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB4_TLBIIPAS2_low` `0x24630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB5_TLBIIPAS2_low` `0x25630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB6_TLBIIPAS2_low` `0x26630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB7_TLBIIPAS2_low` `0x27630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB8_TLBIIPAS2_low` `0x28630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB9_TLBIIPAS2_low` `0x29630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB10_TLBIIPAS2_low` `0x2A630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB11_TLBIIPAS2_low` `0x2B630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB12_TLBIIPAS2_low` `0x2C630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB13_TLBIIPAS2_low` `0x2D630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB14_TLBIIPAS2_low` `0x2E630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB15_TLBIIPAS2_low` `0x2F630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB16_TLBIIPAS2_low` `0x30630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB17_TLBIIPAS2_low` `0x31630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB18_TLBIIPAS2_low` `0x32630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB19_TLBIIPAS2_low` `0x33630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB20_TLBIIPAS2_low` `0x34630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB21_TLBIIPAS2_low` `0x35630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB22_TLBIIPAS2_low` `0x36630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB23_TLBIIPAS2_low` `0x37630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB24_TLBIIPAS2_low` `0x38630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB25_TLBIIPAS2_low` `0x39630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB26_TLBIIPAS2_low` `0x3A630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB27_TLBIIPAS2_low` `0x3B630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB28_TLBIIPAS2_low` `0x3C630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB29_TLBIIPAS2_low` `0x3D630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB30_TLBIIPAS2_low` `0x3E630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB31_TLBIIPAS2_low` `0x3F630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB0_TLBIIPAS2_high` `0x20634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB1_TLBIIPAS2_high` `0x21634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB2_TLBIIPAS2_high` `0x22634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB3_TLBIIPAS2_high` `0x23634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB4_TLBIIPAS2_high` `0x24634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB5_TLBIIPAS2_high` `0x25634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB6_TLBIIPAS2_high` `0x26634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB7_TLBIIPAS2_high` `0x27634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB8_TLBIIPAS2_high` `0x28634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB9_TLBIIPAS2_high` `0x29634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB10_TLBIIPAS2_high` `0x2A634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB11_TLBIIPAS2_high` `0x2B634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB12_TLBIIPAS2_high` `0x2C634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB13_TLBIIPAS2_high` `0x2D634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB14_TLBIIPAS2_high` `0x2E634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB15_TLBIIPAS2_high` `0x2F634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB16_TLBIIPAS2_high` `0x30634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB17_TLBIIPAS2_high` `0x31634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB18_TLBIIPAS2_high` `0x32634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB19_TLBIIPAS2_high` `0x33634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB20_TLBIIPAS2_high` `0x34634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB21_TLBIIPAS2_high` `0x35634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB22_TLBIIPAS2_high` `0x36634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB23_TLBIIPAS2_high` `0x37634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB24_TLBIIPAS2_high` `0x38634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB25_TLBIIPAS2_high` `0x39634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB26_TLBIIPAS2_high` `0x3A634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB27_TLBIIPAS2_high` `0x3B634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB28_TLBIIPAS2_high` `0x3C634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB29_TLBIIPAS2_high` `0x3D634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB30_TLBIIPAS2_high` `0x3E634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB31_TLBIIPAS2_high` `0x3F634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB0_TLBIIPAS2L_low` `0x20638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB1_TLBIIPAS2L_low` `0x21638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB2_TLBIIPAS2L_low` `0x22638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB3_TLBIIPAS2L_low` `0x23638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB4_TLBIIPAS2L_low` `0x24638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB5_TLBIIPAS2L_low` `0x25638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB6_TLBIIPAS2L_low` `0x26638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB7_TLBIIPAS2L_low` `0x27638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB8_TLBIIPAS2L_low` `0x28638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB9_TLBIIPAS2L_low` `0x29638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB10_TLBIIPAS2L_low` `0x2A638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB11_TLBIIPAS2L_low` `0x2B638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB12_TLBIIPAS2L_low` `0x2C638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB13_TLBIIPAS2L_low` `0x2D638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB14_TLBIIPAS2L_low` `0x2E638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB15_TLBIIPAS2L_low` `0x2F638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB16_TLBIIPAS2L_low` `0x30638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB17_TLBIIPAS2L_low` `0x31638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB18_TLBIIPAS2L_low` `0x32638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB19_TLBIIPAS2L_low` `0x33638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB20_TLBIIPAS2L_low` `0x34638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB21_TLBIIPAS2L_low` `0x35638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB22_TLBIIPAS2L_low` `0x36638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB23_TLBIIPAS2L_low` `0x37638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB24_TLBIIPAS2L_low` `0x38638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB25_TLBIIPAS2L_low` `0x39638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB26_TLBIIPAS2L_low` `0x3A638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB27_TLBIIPAS2L_low` `0x3B638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB28_TLBIIPAS2L_low` `0x3C638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB29_TLBIIPAS2L_low` `0x3D638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB30_TLBIIPAS2L_low` `0x3E638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB31_TLBIIPAS2L_low` `0x3F638` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Address` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Address` `WO 0x0`
`SMMU_CB0_TLBIIPAS2L_high` `0x2063C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB1_TLBIIPAS2L_high` `0x2163C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB2_TLBIIPAS2L_high` `0x2263C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB3_TLBIIPAS2L_high` `0x2363C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB4_TLBIIPAS2L_high` `0x2463C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB5_TLBIIPAS2L_high` `0x2563C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB6_TLBIIPAS2L_high` `0x2663C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB7_TLBIIPAS2L_high` `0x2763C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB8_TLBIIPAS2L_high` `0x2863C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB9_TLBIIPAS2L_high` `0x2963C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB10_TLBIIPAS2L_high` `0x2A63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB11_TLBIIPAS2L_high` `0x2B63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB12_TLBIIPAS2L_high` `0x2C63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB13_TLBIIPAS2L_high` `0x2D63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB14_TLBIIPAS2L_high` `0x2E63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB15_TLBIIPAS2L_high` `0x2F63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB16_TLBIIPAS2L_high` `0x3063C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB17_TLBIIPAS2L_high` `0x3163C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB18_TLBIIPAS2L_high` `0x3263C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB19_TLBIIPAS2L_high` `0x3363C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB20_TLBIIPAS2L_high` `0x3463C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB21_TLBIIPAS2L_high` `0x3563C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB22_TLBIIPAS2L_high` `0x3663C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB23_TLBIIPAS2L_high` `0x3763C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB24_TLBIIPAS2L_high` `0x3863C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB25_TLBIIPAS2L_high` `0x3963C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB26_TLBIIPAS2L_high` `0x3A63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB27_TLBIIPAS2L_high` `0x3B63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB28_TLBIIPAS2L_high` `0x3C63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB29_TLBIIPAS2L_high` `0x3D63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB30_TLBIIPAS2L_high` `0x3E63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB31_TLBIIPAS2L_high` `0x3F63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`Address` `WO 0x0`
`SMMU_CB0_TLBSYNC` `0x207F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB1_TLBSYNC` `0x217F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB2_TLBSYNC` `0x227F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB3_TLBSYNC` `0x237F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB4_TLBSYNC` `0x247F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB5_TLBSYNC` `0x257F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB6_TLBSYNC` `0x267F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB7_TLBSYNC` `0x277F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB8_TLBSYNC` `0x287F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB9_TLBSYNC` `0x297F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB10_TLBSYNC` `0x2A7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB11_TLBSYNC` `0x2B7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB12_TLBSYNC` `0x2C7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB13_TLBSYNC` `0x2D7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB14_TLBSYNC` `0x2E7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB15_TLBSYNC` `0x2F7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB16_TLBSYNC` `0x307F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB17_TLBSYNC` `0x317F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB18_TLBSYNC` `0x327F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB19_TLBSYNC` `0x337F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB20_TLBSYNC` `0x347F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB21_TLBSYNC` `0x357F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB22_TLBSYNC` `0x367F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB23_TLBSYNC` `0x377F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB24_TLBSYNC` `0x387F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB25_TLBSYNC` `0x397F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB26_TLBSYNC` `0x3A7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB27_TLBSYNC` `0x3B7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB28_TLBSYNC` `0x3C7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB29_TLBSYNC` `0x3D7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB30_TLBSYNC` `0x3E7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB31_TLBSYNC` `0x3F7F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `WO 0x0`
`SMMU_CB0_TLBSTATUS` `0x207F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB1_TLBSTATUS` `0x217F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB2_TLBSTATUS` `0x227F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB3_TLBSTATUS` `0x237F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB4_TLBSTATUS` `0x247F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB5_TLBSTATUS` `0x257F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB6_TLBSTATUS` `0x267F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB7_TLBSTATUS` `0x277F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB8_TLBSTATUS` `0x287F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB9_TLBSTATUS` `0x297F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB10_TLBSTATUS` `0x2A7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB11_TLBSTATUS` `0x2B7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB12_TLBSTATUS` `0x2C7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB13_TLBSTATUS` `0x2D7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB14_TLBSTATUS` `0x2E7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB15_TLBSTATUS` `0x2F7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB16_TLBSTATUS` `0x307F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB17_TLBSTATUS` `0x317F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB18_TLBSTATUS` `0x327F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB19_TLBSTATUS` `0x337F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB20_TLBSTATUS` `0x347F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB21_TLBSTATUS` `0x357F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB22_TLBSTATUS` `0x367F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB23_TLBSTATUS` `0x377F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB24_TLBSTATUS` `0x387F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB25_TLBSTATUS` `0x397F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB26_TLBSTATUS` `0x3A7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB27_TLBSTATUS` `0x3B7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB28_TLBSTATUS` `0x3C7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB29_TLBSTATUS` `0x3D7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB30_TLBSTATUS` `0x3E7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB31_TLBSTATUS` `0x3F7F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`SACTIVE` `RO 0x0`
`SMMU_CB0_PMEVCNTR0` `0x20E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB1_PMEVCNTR0` `0x21E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB2_PMEVCNTR0` `0x22E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB3_PMEVCNTR0` `0x23E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB4_PMEVCNTR0` `0x24E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB5_PMEVCNTR0` `0x25E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB6_PMEVCNTR0` `0x26E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB7_PMEVCNTR0` `0x27E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB8_PMEVCNTR0` `0x28E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB9_PMEVCNTR0` `0x29E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB10_PMEVCNTR0` `0x2AE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB11_PMEVCNTR0` `0x2BE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB12_PMEVCNTR0` `0x2CE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB13_PMEVCNTR0` `0x2DE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB14_PMEVCNTR0` `0x2EE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB15_PMEVCNTR0` `0x2FE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB16_PMEVCNTR0` `0x30E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB17_PMEVCNTR0` `0x31E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB18_PMEVCNTR0` `0x32E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB19_PMEVCNTR0` `0x33E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB20_PMEVCNTR0` `0x34E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB21_PMEVCNTR0` `0x35E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB22_PMEVCNTR0` `0x36E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB23_PMEVCNTR0` `0x37E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB24_PMEVCNTR0` `0x38E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB25_PMEVCNTR0` `0x39E00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB26_PMEVCNTR0` `0x3AE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB27_PMEVCNTR0` `0x3BE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB28_PMEVCNTR0` `0x3CE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB29_PMEVCNTR0` `0x3DE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB30_PMEVCNTR0` `0x3EE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB31_PMEVCNTR0` `0x3FE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB0_PMEVCNTR1` `0x20E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB1_PMEVCNTR1` `0x21E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB2_PMEVCNTR1` `0x22E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB3_PMEVCNTR1` `0x23E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB4_PMEVCNTR1` `0x24E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB5_PMEVCNTR1` `0x25E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB6_PMEVCNTR1` `0x26E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB7_PMEVCNTR1` `0x27E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB8_PMEVCNTR1` `0x28E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB9_PMEVCNTR1` `0x29E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB10_PMEVCNTR1` `0x2AE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB11_PMEVCNTR1` `0x2BE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB12_PMEVCNTR1` `0x2CE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB13_PMEVCNTR1` `0x2DE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB14_PMEVCNTR1` `0x2EE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB15_PMEVCNTR1` `0x2FE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB16_PMEVCNTR1` `0x30E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB17_PMEVCNTR1` `0x31E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB18_PMEVCNTR1` `0x32E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB19_PMEVCNTR1` `0x33E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB20_PMEVCNTR1` `0x34E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB21_PMEVCNTR1` `0x35E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB22_PMEVCNTR1` `0x36E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB23_PMEVCNTR1` `0x37E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB24_PMEVCNTR1` `0x38E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB25_PMEVCNTR1` `0x39E04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB26_PMEVCNTR1` `0x3AE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB27_PMEVCNTR1` `0x3BE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB28_PMEVCNTR1` `0x3CE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB29_PMEVCNTR1` `0x3DE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB30_PMEVCNTR1` `0x3EE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB31_PMEVCNTR1` `0x3FE04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB0_PMEVCNTR2` `0x20E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB1_PMEVCNTR2` `0x21E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB2_PMEVCNTR2` `0x22E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB3_PMEVCNTR2` `0x23E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB4_PMEVCNTR2` `0x24E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB5_PMEVCNTR2` `0x25E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB6_PMEVCNTR2` `0x26E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB7_PMEVCNTR2` `0x27E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB8_PMEVCNTR2` `0x28E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB9_PMEVCNTR2` `0x29E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB10_PMEVCNTR2` `0x2AE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB11_PMEVCNTR2` `0x2BE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB12_PMEVCNTR2` `0x2CE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB13_PMEVCNTR2` `0x2DE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB14_PMEVCNTR2` `0x2EE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB15_PMEVCNTR2` `0x2FE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB16_PMEVCNTR2` `0x30E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB17_PMEVCNTR2` `0x31E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB18_PMEVCNTR2` `0x32E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB19_PMEVCNTR2` `0x33E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB20_PMEVCNTR2` `0x34E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB21_PMEVCNTR2` `0x35E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB22_PMEVCNTR2` `0x36E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB23_PMEVCNTR2` `0x37E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB24_PMEVCNTR2` `0x38E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB25_PMEVCNTR2` `0x39E08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB26_PMEVCNTR2` `0x3AE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB27_PMEVCNTR2` `0x3BE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB28_PMEVCNTR2` `0x3CE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB29_PMEVCNTR2` `0x3DE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB30_PMEVCNTR2` `0x3EE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB31_PMEVCNTR2` `0x3FE08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB0_PMEVCNTR3` `0x20E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB1_PMEVCNTR3` `0x21E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB2_PMEVCNTR3` `0x22E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB3_PMEVCNTR3` `0x23E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB4_PMEVCNTR3` `0x24E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB5_PMEVCNTR3` `0x25E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB6_PMEVCNTR3` `0x26E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB7_PMEVCNTR3` `0x27E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB8_PMEVCNTR3` `0x28E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB9_PMEVCNTR3` `0x29E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB10_PMEVCNTR3` `0x2AE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB11_PMEVCNTR3` `0x2BE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB12_PMEVCNTR3` `0x2CE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB13_PMEVCNTR3` `0x2DE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB14_PMEVCNTR3` `0x2EE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB15_PMEVCNTR3` `0x2FE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB16_PMEVCNTR3` `0x30E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB17_PMEVCNTR3` `0x31E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB18_PMEVCNTR3` `0x32E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB19_PMEVCNTR3` `0x33E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB20_PMEVCNTR3` `0x34E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB21_PMEVCNTR3` `0x35E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB22_PMEVCNTR3` `0x36E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB23_PMEVCNTR3` `0x37E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB24_PMEVCNTR3` `0x38E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB25_PMEVCNTR3` `0x39E0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB26_PMEVCNTR3` `0x3AE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB27_PMEVCNTR3` `0x3BE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB28_PMEVCNTR3` `0x3CE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB29_PMEVCNTR3` `0x3DE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB30_PMEVCNTR3` `0x3EE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB31_PMEVCNTR3` `0x3FE0C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`bits` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`bits` `RW 0x0`
`SMMU_CB0_PMEVTYPER0` `0x20E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB1_PMEVTYPER0` `0x21E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB2_PMEVTYPER0` `0x22E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB3_PMEVTYPER0` `0x23E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB4_PMEVTYPER0` `0x24E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB5_PMEVTYPER0` `0x25E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB6_PMEVTYPER0` `0x26E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB7_PMEVTYPER0` `0x27E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB8_PMEVTYPER0` `0x28E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB9_PMEVTYPER0` `0x29E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB10_PMEVTYPER0` `0x2AE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB11_PMEVTYPER0` `0x2BE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB12_PMEVTYPER0` `0x2CE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB13_PMEVTYPER0` `0x2DE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB14_PMEVTYPER0` `0x2EE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB15_PMEVTYPER0` `0x2FE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB16_PMEVTYPER0` `0x30E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB17_PMEVTYPER0` `0x31E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB18_PMEVTYPER0` `0x32E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB19_PMEVTYPER0` `0x33E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB20_PMEVTYPER0` `0x34E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB21_PMEVTYPER0` `0x35E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB22_PMEVTYPER0` `0x36E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB23_PMEVTYPER0` `0x37E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB24_PMEVTYPER0` `0x38E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB25_PMEVTYPER0` `0x39E80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB26_PMEVTYPER0` `0x3AE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB27_PMEVTYPER0` `0x3BE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB28_PMEVTYPER0` `0x3CE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB29_PMEVTYPER0` `0x3DE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB30_PMEVTYPER0` `0x3EE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB31_PMEVTYPER0` `0x3FE80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB0_PMEVTYPER1` `0x20E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB1_PMEVTYPER1` `0x21E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB2_PMEVTYPER1` `0x22E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB3_PMEVTYPER1` `0x23E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB4_PMEVTYPER1` `0x24E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB5_PMEVTYPER1` `0x25E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB6_PMEVTYPER1` `0x26E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB7_PMEVTYPER1` `0x27E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB8_PMEVTYPER1` `0x28E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB9_PMEVTYPER1` `0x29E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB10_PMEVTYPER1` `0x2AE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB11_PMEVTYPER1` `0x2BE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB12_PMEVTYPER1` `0x2CE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB13_PMEVTYPER1` `0x2DE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB14_PMEVTYPER1` `0x2EE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB15_PMEVTYPER1` `0x2FE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB16_PMEVTYPER1` `0x30E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB17_PMEVTYPER1` `0x31E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB18_PMEVTYPER1` `0x32E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB19_PMEVTYPER1` `0x33E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB20_PMEVTYPER1` `0x34E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB21_PMEVTYPER1` `0x35E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB22_PMEVTYPER1` `0x36E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB23_PMEVTYPER1` `0x37E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB24_PMEVTYPER1` `0x38E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB25_PMEVTYPER1` `0x39E84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB26_PMEVTYPER1` `0x3AE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB27_PMEVTYPER1` `0x3BE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB28_PMEVTYPER1` `0x3CE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB29_PMEVTYPER1` `0x3DE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB30_PMEVTYPER1` `0x3EE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB31_PMEVTYPER1` `0x3FE84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB0_PMEVTYPER2` `0x20E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB1_PMEVTYPER2` `0x21E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB2_PMEVTYPER2` `0x22E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB3_PMEVTYPER2` `0x23E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB4_PMEVTYPER2` `0x24E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB5_PMEVTYPER2` `0x25E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB6_PMEVTYPER2` `0x26E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB7_PMEVTYPER2` `0x27E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB8_PMEVTYPER2` `0x28E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB9_PMEVTYPER2` `0x29E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB10_PMEVTYPER2` `0x2AE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB11_PMEVTYPER2` `0x2BE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB12_PMEVTYPER2` `0x2CE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB13_PMEVTYPER2` `0x2DE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB14_PMEVTYPER2` `0x2EE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB15_PMEVTYPER2` `0x2FE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB16_PMEVTYPER2` `0x30E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB17_PMEVTYPER2` `0x31E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB18_PMEVTYPER2` `0x32E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB19_PMEVTYPER2` `0x33E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB20_PMEVTYPER2` `0x34E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB21_PMEVTYPER2` `0x35E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB22_PMEVTYPER2` `0x36E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB23_PMEVTYPER2` `0x37E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB24_PMEVTYPER2` `0x38E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB25_PMEVTYPER2` `0x39E88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB26_PMEVTYPER2` `0x3AE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB27_PMEVTYPER2` `0x3BE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB28_PMEVTYPER2` `0x3CE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB29_PMEVTYPER2` `0x3DE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB30_PMEVTYPER2` `0x3EE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB31_PMEVTYPER2` `0x3FE88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB0_PMEVTYPER3` `0x20E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB1_PMEVTYPER3` `0x21E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB2_PMEVTYPER3` `0x22E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB3_PMEVTYPER3` `0x23E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB4_PMEVTYPER3` `0x24E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB5_PMEVTYPER3` `0x25E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB6_PMEVTYPER3` `0x26E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB7_PMEVTYPER3` `0x27E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB8_PMEVTYPER3` `0x28E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB9_PMEVTYPER3` `0x29E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB10_PMEVTYPER3` `0x2AE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB11_PMEVTYPER3` `0x2BE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB12_PMEVTYPER3` `0x2CE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB13_PMEVTYPER3` `0x2DE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB14_PMEVTYPER3` `0x2EE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB15_PMEVTYPER3` `0x2FE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB16_PMEVTYPER3` `0x30E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB17_PMEVTYPER3` `0x31E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB18_PMEVTYPER3` `0x32E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB19_PMEVTYPER3` `0x33E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB20_PMEVTYPER3` `0x34E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB21_PMEVTYPER3` `0x35E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB22_PMEVTYPER3` `0x36E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB23_PMEVTYPER3` `0x37E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB24_PMEVTYPER3` `0x38E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB25_PMEVTYPER3` `0x39E8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB26_PMEVTYPER3` `0x3AE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB27_PMEVTYPER3` `0x3BE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB28_PMEVTYPER3` `0x3CE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB29_PMEVTYPER3` `0x3DE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB30_PMEVTYPER3` `0x3EE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB31_PMEVTYPER3` `0x3FE8C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`P` `RW 0x0`	`U` `RW 0x0`	`NSP` `RW 0x0`	`NSU` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`EVENT` `RW 0x0`
`SMMU_CB0_PMCFGR` `0x20F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB1_PMCFGR` `0x21F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB2_PMCFGR` `0x22F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB3_PMCFGR` `0x23F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB4_PMCFGR` `0x24F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB5_PMCFGR` `0x25F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB6_PMCFGR` `0x26F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB7_PMCFGR` `0x27F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB8_PMCFGR` `0x28F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB9_PMCFGR` `0x29F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB10_PMCFGR` `0x2AF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB11_PMCFGR` `0x2BF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB12_PMCFGR` `0x2CF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB13_PMCFGR` `0x2DF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB14_PMCFGR` `0x2EF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB15_PMCFGR` `0x2FF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB16_PMCFGR` `0x30F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB17_PMCFGR` `0x31F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB18_PMCFGR` `0x32F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB19_PMCFGR` `0x33F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB20_PMCFGR` `0x34F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB21_PMCFGR` `0x35F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB22_PMCFGR` `0x36F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB23_PMCFGR` `0x37F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB24_PMCFGR` `0x38F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB25_PMCFGR` `0x39F00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB26_PMCFGR` `0x3AF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB27_PMCFGR` `0x3BF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB28_PMCFGR` `0x3CF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB29_PMCFGR` `0x3DF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB30_PMCFGR` `0x3EF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB31_PMCFGR` `0x3FF00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NCG` `RO 0x0`								`Reserved`				`UEN` `RO 0x0`	`Reserved`		`EX` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CCD` `RO 0x0`	`CC` `RO 0x0`	`SIZE` `RO 0x1F`						`N` `RO 0x3`
`SMMU_CB0_PMCR` `0x20F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB1_PMCR` `0x21F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB2_PMCR` `0x22F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB3_PMCR` `0x23F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB4_PMCR` `0x24F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB5_PMCR` `0x25F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB6_PMCR` `0x26F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB7_PMCR` `0x27F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB8_PMCR` `0x28F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB9_PMCR` `0x29F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB10_PMCR` `0x2AF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB11_PMCR` `0x2BF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB12_PMCR` `0x2CF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB13_PMCR` `0x2DF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB14_PMCR` `0x2EF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB15_PMCR` `0x2FF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB16_PMCR` `0x30F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB17_PMCR` `0x31F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB18_PMCR` `0x32F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB19_PMCR` `0x33F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB20_PMCR` `0x34F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB21_PMCR` `0x35F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB22_PMCR` `0x36F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB23_PMCR` `0x37F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB24_PMCR` `0x38F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB25_PMCR` `0x39F04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB26_PMCR` `0x3AF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB27_PMCR` `0x3BF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB28_PMCR` `0x3CF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB29_PMCR` `0x3DF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB30_PMCR` `0x3EF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB31_PMCR` `0x3FF04` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`IMP` `RO 0x0`								`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`X` `RW 0x0`	`Reserved`		`P` `RO 0x0`	`E` `RW 0x0`
`SMMU_CB0_PMCEID` `0x20F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB1_PMCEID` `0x21F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB2_PMCEID` `0x22F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB3_PMCEID` `0x23F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB4_PMCEID` `0x24F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB5_PMCEID` `0x25F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB6_PMCEID` `0x26F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB7_PMCEID` `0x27F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB8_PMCEID` `0x28F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB9_PMCEID` `0x29F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB10_PMCEID` `0x2AF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB11_PMCEID` `0x2BF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB12_PMCEID` `0x2CF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB13_PMCEID` `0x2DF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB14_PMCEID` `0x2EF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB15_PMCEID` `0x2FF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB16_PMCEID` `0x30F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB17_PMCEID` `0x31F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB18_PMCEID` `0x32F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB19_PMCEID` `0x33F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB20_PMCEID` `0x34F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB21_PMCEID` `0x35F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB22_PMCEID` `0x36F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB23_PMCEID` `0x37F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB24_PMCEID` `0x38F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB25_PMCEID` `0x39F20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB26_PMCEID` `0x3AF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB27_PMCEID` `0x3BF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB28_PMCEID` `0x3CF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB29_PMCEID` `0x3DF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB30_PMCEID` `0x3EF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB31_PMCEID` `0x3FF20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`Event0x12` `RO 0x1`	`Event0x11` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Event0x10` `RO 0x0`	`Reserved`					`Event0x0A` `RO 0x1`	`Event0x09` `RO 0x1`	`Event0x08` `RO 0x0`	`Reserved`					`Event0x01` `RO 0x1`	`Event0x00` `RO 0x1`
`SMMU_CB0_PMCNTENSE` `0x20F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB1_PMCNTENSE` `0x21F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB2_PMCNTENSE` `0x22F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB3_PMCNTENSE` `0x23F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB4_PMCNTENSE` `0x24F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB5_PMCNTENSE` `0x25F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB6_PMCNTENSE` `0x26F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB7_PMCNTENSE` `0x27F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB8_PMCNTENSE` `0x28F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB9_PMCNTENSE` `0x29F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB10_PMCNTENSE` `0x2AF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB11_PMCNTENSE` `0x2BF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB12_PMCNTENSE` `0x2CF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB13_PMCNTENSE` `0x2DF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB14_PMCNTENSE` `0x2EF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB15_PMCNTENSE` `0x2FF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB16_PMCNTENSE` `0x30F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB17_PMCNTENSE` `0x31F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB18_PMCNTENSE` `0x32F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB19_PMCNTENSE` `0x33F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB20_PMCNTENSE` `0x34F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB21_PMCNTENSE` `0x35F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB22_PMCNTENSE` `0x36F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB23_PMCNTENSE` `0x37F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB24_PMCNTENSE` `0x38F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB25_PMCNTENSE` `0x39F40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB26_PMCNTENSE` `0x3AF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB27_PMCNTENSE` `0x3BF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB28_PMCNTENSE` `0x3CF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB29_PMCNTENSE` `0x3DF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB30_PMCNTENSE` `0x3EF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB31_PMCNTENSE` `0x3FF40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB0_PMCNTENCLR` `0x20F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB1_PMCNTENCLR` `0x21F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB2_PMCNTENCLR` `0x22F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB3_PMCNTENCLR` `0x23F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB4_PMCNTENCLR` `0x24F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB5_PMCNTENCLR` `0x25F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB6_PMCNTENCLR` `0x26F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB7_PMCNTENCLR` `0x27F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB8_PMCNTENCLR` `0x28F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB9_PMCNTENCLR` `0x29F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB10_PMCNTENCLR` `0x2AF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB11_PMCNTENCLR` `0x2BF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB12_PMCNTENCLR` `0x2CF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB13_PMCNTENCLR` `0x2DF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB14_PMCNTENCLR` `0x2EF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB15_PMCNTENCLR` `0x2FF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB16_PMCNTENCLR` `0x30F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB17_PMCNTENCLR` `0x31F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB18_PMCNTENCLR` `0x32F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB19_PMCNTENCLR` `0x33F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB20_PMCNTENCLR` `0x34F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB21_PMCNTENCLR` `0x35F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB22_PMCNTENCLR` `0x36F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB23_PMCNTENCLR` `0x37F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB24_PMCNTENCLR` `0x38F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB25_PMCNTENCLR` `0x39F44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB26_PMCNTENCLR` `0x3AF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB27_PMCNTENCLR` `0x3BF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB28_PMCNTENCLR` `0x3CF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB29_PMCNTENCLR` `0x3DF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB30_PMCNTENCLR` `0x3EF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB31_PMCNTENCLR` `0x3FF44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB0_PMCNTENSET` `0x20F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB1_PMCNTENSET` `0x21F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB2_PMCNTENSET` `0x22F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB3_PMCNTENSET` `0x23F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB4_PMCNTENSET` `0x24F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB5_PMCNTENSET` `0x25F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB6_PMCNTENSET` `0x26F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB7_PMCNTENSET` `0x27F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB8_PMCNTENSET` `0x28F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB9_PMCNTENSET` `0x29F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB10_PMCNTENSET` `0x2AF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB11_PMCNTENSET` `0x2BF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB12_PMCNTENSET` `0x2CF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB13_PMCNTENSET` `0x2DF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB14_PMCNTENSET` `0x2EF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB15_PMCNTENSET` `0x2FF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB16_PMCNTENSET` `0x30F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB17_PMCNTENSET` `0x31F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB18_PMCNTENSET` `0x32F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB19_PMCNTENSET` `0x33F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB20_PMCNTENSET` `0x34F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB21_PMCNTENSET` `0x35F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB22_PMCNTENSET` `0x36F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB23_PMCNTENSET` `0x37F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB24_PMCNTENSET` `0x38F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB25_PMCNTENSET` `0x39F48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB26_PMCNTENSET` `0x3AF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB27_PMCNTENSET` `0x3BF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB28_PMCNTENSET` `0x3CF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB29_PMCNTENSET` `0x3DF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB30_PMCNTENSET` `0x3EF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB31_PMCNTENSET` `0x3FF48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB0_PMINTENCLR` `0x20F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB1_PMINTENCLR` `0x21F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB2_PMINTENCLR` `0x22F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB3_PMINTENCLR` `0x23F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB4_PMINTENCLR` `0x24F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB5_PMINTENCLR` `0x25F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB6_PMINTENCLR` `0x26F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB7_PMINTENCLR` `0x27F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB8_PMINTENCLR` `0x28F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB9_PMINTENCLR` `0x29F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB10_PMINTENCLR` `0x2AF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB11_PMINTENCLR` `0x2BF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB12_PMINTENCLR` `0x2CF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB13_PMINTENCLR` `0x2DF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB14_PMINTENCLR` `0x2EF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB15_PMINTENCLR` `0x2FF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB16_PMINTENCLR` `0x30F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB17_PMINTENCLR` `0x31F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB18_PMINTENCLR` `0x32F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB19_PMINTENCLR` `0x33F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB20_PMINTENCLR` `0x34F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB21_PMINTENCLR` `0x35F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB22_PMINTENCLR` `0x36F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB23_PMINTENCLR` `0x37F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB24_PMINTENCLR` `0x38F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB25_PMINTENCLR` `0x39F4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB26_PMINTENCLR` `0x3AF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB27_PMINTENCLR` `0x3BF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB28_PMINTENCLR` `0x3CF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB29_PMINTENCLR` `0x3DF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB30_PMINTENCLR` `0x3EF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB31_PMINTENCLR` `0x3FF4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB0_PMOVSCLR` `0x20F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB1_PMOVSCLR` `0x21F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB2_PMOVSCLR` `0x22F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB3_PMOVSCLR` `0x23F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB4_PMOVSCLR` `0x24F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB5_PMOVSCLR` `0x25F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB6_PMOVSCLR` `0x26F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB7_PMOVSCLR` `0x27F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB8_PMOVSCLR` `0x28F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB9_PMOVSCLR` `0x29F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB10_PMOVSCLR` `0x2AF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB11_PMOVSCLR` `0x2BF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB12_PMOVSCLR` `0x2CF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB13_PMOVSCLR` `0x2DF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB14_PMOVSCLR` `0x2EF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB15_PMOVSCLR` `0x2FF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB16_PMOVSCLR` `0x30F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB17_PMOVSCLR` `0x31F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB18_PMOVSCLR` `0x32F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB19_PMOVSCLR` `0x33F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB20_PMOVSCLR` `0x34F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB21_PMOVSCLR` `0x35F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB22_PMOVSCLR` `0x36F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB23_PMOVSCLR` `0x37F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB24_PMOVSCLR` `0x38F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB25_PMOVSCLR` `0x39F50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB26_PMOVSCLR` `0x3AF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB27_PMOVSCLR` `0x3BF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB28_PMOVSCLR` `0x3CF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB29_PMOVSCLR` `0x3DF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB30_PMOVSCLR` `0x3EF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB31_PMOVSCLR` `0x3FF50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB0_PMOVSSET` `0x20F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB1_PMOVSSET` `0x21F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB2_PMOVSSET` `0x22F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB3_PMOVSSET` `0x23F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB4_PMOVSSET` `0x24F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB5_PMOVSSET` `0x25F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB6_PMOVSSET` `0x26F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB7_PMOVSSET` `0x27F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB8_PMOVSSET` `0x28F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB9_PMOVSSET` `0x29F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB10_PMOVSSET` `0x2AF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB11_PMOVSSET` `0x2BF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB12_PMOVSSET` `0x2CF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB13_PMOVSSET` `0x2DF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB14_PMOVSSET` `0x2EF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB15_PMOVSSET` `0x2FF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB16_PMOVSSET` `0x30F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB17_PMOVSSET` `0x31F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB18_PMOVSSET` `0x32F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB19_PMOVSSET` `0x33F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB20_PMOVSSET` `0x34F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB21_PMOVSSET` `0x35F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB22_PMOVSSET` `0x36F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB23_PMOVSSET` `0x37F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB24_PMOVSSET` `0x38F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB25_PMOVSSET` `0x39F58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB26_PMOVSSET` `0x3AF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB27_PMOVSSET` `0x3BF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB28_PMOVSSET` `0x3CF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB29_PMOVSSET` `0x3DF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB30_PMOVSSET` `0x3EF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`SMMU_CB31_PMOVSSET` `0x3FF58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`P3` `WO 0x0`	`P2` `WO 0x0`	`P1` `WO 0x0`	`P0` `WO 0x0`
`smmu_cb0_pmauthstatus` `0x20FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb1_pmauthstatus` `0x21FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb2_pmauthstatus` `0x22FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb3_pmauthstatus` `0x23FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb4_pmauthstatus` `0x24FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb5_pmauthstatus` `0x25FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb6_pmauthstatus` `0x26FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb7_pmauthstatus` `0x27FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb8_pmauthstatus` `0x28FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb9_pmauthstatus` `0x29FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb10_pmauthstatus` `0x2AFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb11_pmauthstatus` `0x2BFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb12_pmauthstatus` `0x2CFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb13_pmauthstatus` `0x2DFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb14_pmauthstatus` `0x2EFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb15_pmauthstatus` `0x2FFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb16_pmauthstatus` `0x30FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb17_pmauthstatus` `0x31FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb18_pmauthstatus` `0x32FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb19_pmauthstatus` `0x33FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb20_pmauthstatus` `0x34FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb21_pmauthstatus` `0x35FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb22_pmauthstatus` `0x36FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb23_pmauthstatus` `0x37FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb24_pmauthstatus` `0x38FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb25_pmauthstatus` `0x39FB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb26_pmauthstatus` `0x3AFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb27_pmauthstatus` `0x3BFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb28_pmauthstatus` `0x3CFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb29_pmauthstatus` `0x3DFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb30_pmauthstatus` `0x3EFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`
`smmu_cb31_pmauthstatus` `0x3FFB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SNI` `RO 0x1`	`SNE` `RO 0x0`	`SI` `RO 0x0`	`SE` `RO 0x0`	`NSNI` `RO 0x0`	`NSNE` `RO 0x0`	`NSI` `RO 0x0`	`NSE` `RO 0x0`