SMMU_CBAR7

         Specifies configuration attributes for translation context bank.
      
Note: For register and programming information, please refer to the Arm® CoreLink™ MMU System Memory Management Unit Technical Reference Manual.
Module Instance Base Address Register Address
i_aps_smmu_secure_registers 0xFA000000 0xFA00101C

Size: 32

Offset: 0x101C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IRPTNDX

RO 0x0

WACFG

RW 0x0

RACFG

RW 0x0

BSU

RW 0x0

TYPE

RW 0x2

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

MEMATTR_CBNDX_7_4

RW 0x0

FB_CBNDX_3

RW 0x0

HYPC_CBNDX_2

RW 0x0

BPSHCFG_CBNDX_1_0

RW 0x0

VMID

RW 0x0