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  1. Intel® Products
  2. Altera® FPGA, SoC FPGA and CPLD
  3. Altera® FPGA Intellectual Property
  4. Digital Signal Processing IP Cores
  5. Video and Vision Processing Suite

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Video and Vision Processing Suite

The Intel® FPGA Video and Vision Processing Suite is a collection of next-generation Intel® FPGA intellectual property (IP) functions that you can use to facilitate the development of custom video and image processing designs. These Intel® FPGA IP functions are suitable for use in a wide variety of image processing and display applications, such as studio broadcast, video conferencing, AV networking, medical imaging, industrial inspections and robotics, smart city/retail and consumer.

Video and Vision Processing Suite

  • Overview
  • Applications

The Video and Vision Processing (VVP) Suite features IPs that range from simple building block functions such as clocked video and genlock suite, color space conversion, and mixer to sophisticated processing functions that can implement programmable scaling, arbitrary non-linear distortion correction, 3D look-up table, adaptive tone mapping and many more.

Features and benefits:

  • 45+ new IP cores
  • AXI4-Stream + Backward Compatible
  • Mix and match video and image processing IPs with your own proprietary IP
  • Consistent performance: Fmax > 600 MHz
  • Optimized for 8K60 and above
  • HDR, Genlock, ISP
  • Premium cores: Warp, 3D LUT, TMO
  • 8-16 bps, 1-8 PIP
  • RGB and YCbCr 444, 422, and 420 color spaces
  • Data precision of 8-16 bits per symbol
  • Video fields with 1-16384 pixels in both height and width
  • Ordering Information
  • Documentation
  • Key Features
  • Demo Videos
IP Included with the purchase of Intel® Quartus® Prime Design Software Ordering Codes Primary Renewal
VVP IP Suite No IPS-VIDEO Mouser Electronics
None
TMO Intel® FPGA IP No IP-OM-TMO

Digikey

Mouser Electronics

None
Warp Intel® FPGA IP No IP-OM-WARP

Digikey

Mouser Electronics

None
3D LUT Intel® FPGA IP No IP- OM-93D-LUT

Digikey

Mouser Electronics

None

To activate TMO, Warp, and 3D LUT, purchase/activation of a separate IP license is required for proper use with the Intel® Quartus® Prime Design Software. Contact your local Intel sales representative for pricing details.

The Intel® FPGA IP Evaluation Mode allows you to evaluate all Video and Vision Processing Suite Cores before deciding to purchase a license.

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Video and Vision Processing Suite Intel® FPGA IP User Guide

Intel® FPGA Streaming Video Protocol Specification

Intel® FPGA IP Release Notes

Intel Tools for Media Software Developers

How Intel Agilex® 7 FPGA is enabling resource and power efficient 4K, 8K video processing solutions

Video and Vision Processing Suite Intel FPGA IP Functions

Intel FPGA IP Function

Description

Clocked Video Input (CVI) and Clocked Video Output (CVO)

The Clocked Video Interface IPs convert clocked video formats (such as BT656, BT1120, and DVI) to AXI4-Streaming video; and vice versa.

Full-Raster to Clocked Video Converter

Remaps pixel data and video timing information from Intel FPGA streaming full-raster protocol to clocked video format.

Clocked Video to Full-Raster Converter

Remaps pixel data and video timing information from clocked video format to Intel FPGA streaming full-raster protocol.

Full-Raster to Streaming Converter

Provides a seamless conversion between Intel FPGA streaming full-raster and Intel FPGA streaming video lite protocols.

Video Broadcaster

Broadcasts a single input video bus (in multiple formats) to multiple destinations.

Video Crosspoint

Routes discrete signals around an FPGA design under software control. An M inputs to N outputs data crosspoint for single bit signals.

Genlock Router / Profiler

Multi-channel genlock strobe extractor and router. This IP allows passing genlock timing signals to internal or external FPGA multi-rate video clock generators, to facilitate video input and output clock genlock and/or frame synchronization, based on video timing markers derived from video connectivity IP.

Video Timing Generator

Generates real-time video timing signals according to Full-Raster or Clocked Video standards.

Test Pattern Generator

Generates a video stream that contains a test pattern.

Clipper

Crops an active area from a video stream and discards the remainder.

3D LUT

Provides an efficient solution for video color space and dynamic range conversions, chroma-keying, and the creation of artistic effects.

Warp

Applies geometric corrections and arbitrary non-linear distortions to a real-time video stream.

Tone Mapping Operator

Corrects poorly exposed images and video to reveal invisible details.

Scaler

Resizes input video stream to produce output of a different height and or width.

2D FIR Filter

Implements a 3x3, 5x5, or 7x7 finite impulse response (FIR) filter on an image data stream to smooth or sharpen images.

Switch

Allows video streams to be switched in real time.

Mixer

Allows you to overlay video fields from multiple inputs on each other, either with or without alpha blending (transparency). Mixer is used for implementing text overlay and picture-in-picture mixing.

Chroma Resampler

Converts between the different chroma sampling formats available in the YCbCr color space, for example from 4:2:2 to 4:4:4 or 4:2:2 to 4:2:0.

Color Space Converter

Converts video data between color spaces such as RGB to YCbCr.

Video Frame Buffer

Buffers video frames into external RAM. This IP supports double or triple-buffering with a range of options for frame dropping and repeating.

Protocol Converter

Converts between three interface protocols: Avalon streaming video, Intel FPGA streaming video lite variant and Intel FPGA streaming video full variant.

Pixels in Parallel Converter

Allows multiple pixels to be transmitted in a single clock cycle (beat). Converts from one value of pixels in parallel at the input interface to a higher or lower number of pixels in parallel at the output interface.

Guard Bands

Compares each color plane in the input video stream to upper and lower guard bands values. It replaces the pixel value falling outside of the guard bands by the respective guard band values.

Video Streaming FIFO

Provides a FIFO buffer storage solution with input and output interfaces compliant to the Intel FPGA streaming video protocol.

Deinterlacer

Converts interlaced video formats to progressive video format using a deinterlacing algorithm. Currently only supports "bob" algorithm ("weave," low-angle edge detection, 3:2 cadence detection and motion adaptive to be added in future).

Frame Cleaner

Removes and repairs the non-ideal sequences and error cases present in the incoming data stream to produce an output stream that complies with the implicit ideal use model.

Color Plane Sequencer

Changes how color plane samples are transmitted across the Intel FPGA video streaming protocol. This function can be used to split and join video streams, giving control over the routing of color plane samples.

Gamma Corrector

Allows video streams to be corrected for the physical properties of display devices.

Interlacer

Converts progressive video to interlaced video by dropping half the lines of incoming progressive frames.

Chroma Key Appends an additional alpha plane to each incoming pixel of video data. The alpha value attached is either constant or conditional depending on pixel value. This IP in conjunction with Mixer IP enables Chroma Key applications.
Stream Cleaner Fixes broken streams of video.
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Clocked Video Genlock (CVG) Demo on Agilex™ 7 FPGA I-Series Development Kit

Up Down Cross Conversion (UDX) Demo on Agilex™ 7 FPGA I-Series SoC Development Kit

Additional Resources

Find IP

Find the right Altera® FPGA Intellectual Property core for your needs.

Technical Support

For technical support on this IP core, please visit Support Resources or Intel® Premier Support. You may also search for related topics on this function in the Knowledge Center and Communities.

IP Evaluation and Purchase

Evaluation mode and purchasing information for Altera® FPGA Intellectual Property cores.

IP Base Suite

Free Altera® FPGA IP Core licenses with an active license for Quartus® Prime Standard or Pro Edition Software.

Design Examples

Download design examples and reference designs for Altera® FPGA devices.

Contact Sales

Get in touch with sales for your Altera® FPGA product design and acceleration needs.

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