Warp Intel® FPGA IP

The Warp Intel® FPGA IP is a highly optimized IP core for applying geometric corrections and arbitrary non-linear distortions to a real-time video stream.

Warp Intel® FPGA IP Product Brief ›

Video and Vision Processing Suite Intel® FPGA IP User Guide ›

Intel® FPGA Streaming Video Protocol Specification ›

Warp Intel® FPGA IP

IP Quality Metrics

Basics

Year IP was first released

2021

Latest version of Intel® Quartus® design software supported

21.3

Status

Production

Deliverables

Customer deliverables include the following:

    Design file (encrypted source code or post-synthesis netlist)

    Timing and/or layout constraints

    User guide

Yes

Any additional customer deliverables provided with IP

Testbench and design example

Parameterization GUI allowing end user to configure IP

Yes

IP core is enabled for Intel FPGA IP Evaluation Mode Support

Yes

Source language

Verilog

Testbench language

Verilog

Software drivers provided

Yes

Driver OS Support

Bare metal

Implementation

User interface

Intel FPGA Streaming Video Protocol, Intel Avalon Memory-Mapped

IP-XACT metadata

No

Verification

Simulators supported

VCS, VCS MX, Active-HDL, Riviera-PRO, Xcelium, Questa-Intel® FPGA Edition, Questa

Hardware validated

Intel® Arria® 10 GX

Industry-standard compliance testing performed

No

If Yes, which test(s)?

N/A

If Yes, on which Intel FPGA device(s)?

N/A

If Yes, date performed

N/A

If No, is it planned?

N/A

Interoperability

IP has undergone interoperability testing

Yes

If yes, on which Intel FPGA device(s)

Intel® Cyclone® 10, Intel® Arria® 10, Intel® Stratix® 10, Intel® Agilex™

Interoperability reports available

No