Altera® AXI4 Bus Functional Model User Guides

ID 838773
Date 5/19/2025
Public
Document Table of Contents

1.4. Using the Altera® AXI4 Memory-Mapped BFMs

The following section provides guidance on using the Manager and Subordinate BFMs, with examples of both RTL and Platform Designer flows. You instantiate the BFMs with a connection to the device under test in the testbench. You then can compile the testbench and BFM files in the simulator with the altera_lnsim_ver library.