1.1.1. Altera® AXI4 Memory-Mapped Specification Support
1.1.2. Altera® AXI4 Memory-Mapped BFM Components
1.1.3. Altera® AXI4 Memory-Mapped Supported Features
1.1.4. Altera® AXI4 Memory-Mapped BFM SystemVerilog Packages
1.1.5. Altera® AXI4 Memory-Mapped BFM Supported Flows
1.1.6. Altera® AXI4 Memory-Mapped BFM Supported Simulators
1.3.1. Altera® AXI4 Memory-Mapped Manager BFM Configuration
1.3.2. Altera® AXI4 Memory-Mapped Manager BFM Interface
1.3.3. Altera® AXI4 Memory-Mapped Subordinate BFM Configuration
1.3.4. Altera® AXI4 Memory-Mapped Subordinate BFM Interface
1.3.5. Altera® AXI4-Lite Memory-Mapped Manager BFM Configuration
1.3.6. Altera® AXI4-Lite Memory-Mapped Manager BFM Interface
1.3.7. Altera® AXI4-Lite Memory-Mapped Subordinate BFM Configuration
1.3.8. Altera® AXI4-Lite Memory-Mapped Subordinate BFM Interface
1.3.9. Altera® AXI4 Memory-Mapped Inline Monitor Configuration
1.3.10. Altera® AXI4 Inline Monitor Interface
1.4.1. Using the Altera® AXI4 Memory-Mapped Manager BFM Flow
1.4.2. Using the Altera® AXI4 Memory-Mapped Subordinate BFM Flow
1.4.3. Using the Altera® AXI4 Memory-Mapped Monitor BFM Flow
1.4.4. Altera® AXI4 Memory-Mapped Manager RTL Implementation Example
1.4.5. Altera® AXI4 Memory-Mapped Manager Platform Designer BFM Implementation Example
1.5.1. Altera® AXI4 Memory-Mapped BFM Configuration API
1.5.2. Altera® AXI4 Memory-Mapped BFM Reset API
1.5.3. Altera® AXI4 Memory-Mapped Manager Transaction Creation API
1.5.4. Altera® AXI4 Memory-Mapped Subordinate Transaction Creation API
1.5.5. Altera® AXI4 Memory-Mapped Transaction Configuration API
1.5.6. Altera® AXI4 Memory-Mapped BFM Transaction Execution API
1.5.7. Altera® AXI4 Memory-Mapped Host Memory API
2.5.1.2.1. Class Axi4StreamBytes
2.5.1.2.2. Data Members in Axi4StreamBytes Class
2.5.1.2.3. Methods in Axi4StreamBytes Class
2.5.1.2.4. Class Axi4StreamBytesData
2.5.1.2.5. Methods in Axi4StreamBytesData Class
2.5.1.2.6. Class Axi4StreamBytesPosition
2.5.1.2.7. Methods in Axi4StreamBytesPosition Class
2.5.1.2.8. Class Axi4StreamBytesNull
2.5.1.2.9. Methods in Axi4StreamBytesNull Class
2.5.1.2.10. Class Axi4StreamBytesDataError
2.5.1.2.11. Data Members in Axi4StreamBytesDataError Class
2.5.1.2.12. Methods in Class Axi4StreamBytesDataError
2.5.1.2.13. Class Axi4StreamBytesPositionError
2.5.1.2.14. Data Members in Class Axi4StreamBytesPositionError
2.5.1.2.15. Methods in Class Axi4StreamBytesPositionError
2.5.1.2.16. Class Axi4StreamBytesNullError
2.5.1.2.17. Data Members in Class Axi4StreamBytesNullError
2.5.1.2.18. Methods in Class Axi4StreamBytesNullError
1.1.3. Altera® AXI4 Memory-Mapped Supported Features
The following table shows support for AXI4 features by the AMBA AXI and ACE Protocol Specification, the Altera® AXI4 memory-mapped BFM, and by Platform Designer interconnect.
AXI4 Feature | AMBA Specification Support | Platform Designer Interconnect Support | Altera AXI4 BFM Support |
---|---|---|---|
Independent Write and Read Transactions | Yes | Yes | Yes |
Fixed Burst | Yes | Yes | Yes |
Incremental Burst | Yes | Yes | Yes |
Wrap Burst | Yes | Yes | Yes |
Multiple Outstanding transactions | Yes | Yes | No |
Fully independent Address/Data Channels | Yes | No | Yes |
Unaligned transfer | Yes | Yes | Yes |
Narrow transfer | Yes | Yes | Yes |
Cache | Yes | No | No |
Protection | Yes | Yes | No |
Exclusive | Yes | Yes | Yes |
QoS | Yes | Yes | Yes1 |
Region | Yes | Yes | No2 |
User | Yes | Yes | Yes3 |
Interleaved Reads | Yes | No | No |
Interleaved Writes (AXI3) | Yes | Yes | No |
Lock (AXI3) | Yes | Yes | No |
The Altera® AXI4 memory-mapped BFMs provide medium to high level APIs and methods to model manager and subordinate behavior complying with the AMBA AXI4 specification. Additionally, the Altera® AXI4 Memory-Mapped Subordinate BFM implements memory agent behavior with its own host memory model for read and write transactions.
Currently, the Subordinate BFM does not implement the following, even though the manager can set these signals, and the same are received at the subordinate end:
- Out of order or interleaving behavior
- Protection in host memory model
- Cache bit processing
- Region
- QoS
- Processing User signals
Related Information
1 The manager can generate QoS and user information to the subordinate, but is not consumed and is considered passthrough. The AXI specification does not specify any implementation requirements to support QoS or User.
2 The subordinate has 2(default)-16 regions defined for multiple region testing purposes.
3 The manager can generate QoS and user information to the subordinate, but is not consumed and is considered passthrough. The AXI specification does not specify any implementation requirements to support QoS or User.