1G/2.5G/5G/10G Multirate Ethernet PHY Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813667
Date 4/01/2024

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Document Table of Contents

1.2. Features

Table 2.   1G/2.5G/5G/10G Multirate Ethernet PHY Intel® FPGA IP Core Features
Feature Description
Operating speeds 10M, 100M, 1G, 2.5G, 5G, and 10G.
MAC-side interface 8-bit GMII for 10M/100M/1G/2.5G (MGBASE-T).
16-bit GMII for 10M/100M/1G/2.5G (MGBASE-T).
32-bit XGMII for 10M/100M/1G/2.5G/5G/10G (USXGMII/NBASE-T).
Network-side interface 1.25 Gbps for 1G (MGBASE-T) and 10M/100M/1G (SGMII).
3.125 Gbps for 2.5G (MGBASE-T).
10.3125 Gbps for 10M/100M/1G/2.5G/5G/10G (USXGMII/NBASE-T).
Avalon® memory-mapped interface Provides access to the configuration registers of the PHY.
PCS function 1000BASE-X for 1GbE.
SGMII (10M/100M/1G) for 1GbE and 2.5GbE.
USXGMII PCS for 10M/100M/1G/2.5G/5G/10G (USXGMII).

Not supported.

IEEE 1588v2
  • Supported in 1G and 1G/2.5G (MGBASE-T) configuration.
  • Not supported in NBASE-T configuration.

Not supported.

Table 3.  Supported Line-side Modes for 1G/2.5G/5G/10G Multirate Ethernet PHY Intel® FPGA IP for Agilex™ 5 Devices
Line-side Protocol Low Latency Ethernet 10G MAC Configurations 1G/2.5G/5G/10G Multirate Ethernet PHY Configurations
NBASE-T (via USXGMII) 10M/100M/1G/2.5G/5G/10G (USXGMII) without IEEE1588 10M/100M/1G/2.5G/5G/10G (NBASE-T)
MGBASE-T (via SGMII/SGMII+) 10M/100M/1G/2.5G (MGBASE-T) without IEEE1588 10M/100M/1G/2.5G (MGBASE-T)
1G/2.5G (MGBASE-T) with IEEE1588 1G/2.5G (MGBASE-T)