Visible to Intel only — GUID: rej1699437888899
Ixiasoft
Visible to Intel only — GUID: rej1699437888899
Ixiasoft
5.1.1. F-Tile Low Latency 100G Ethernet Intel® FPGA IP TX MAC Datapath
The TX MAC module receives the client payload data with the destination and source addresses. It then adds, appends, or updates various header fields in accordance with the configuration specified. The MAC does not modify the destination address, the source address, or the payload received from the client. However, the TX MAC module adds a preamble, if the IP core is not configured to receive the preamble from user logic. It pads the payload of frames greater than eight bytes to satisfy the minimum Ethernet frame payload of 46 bytes. By default, the MAC inserts the CRC bytes. The TX MAC module inserts IDLE bytes to maintain an average IPG of 12.
- <p> = payload size, which is arbitrarily large
- <s> = number of padding bytes (0–46)
- <g> = number of IPG bytes