Intel® Simics® Simulator for Intel® FPGAs: User Guide

ID 784383
Date 12/04/2023

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6.3.6. Tracing Breakpoints

Tracing is a way to observe what is going on during the simulation. The Intel® Simics® simulator breakpoint manager includes tracing functionality for several types of events. This means that messages (in fact, Intel® Simics® simulator log messages) are printed when an event of the specified occurs. Such a sequence of messages is what is here is known as a trace. Next are shown some examples on how the trace functionality can be used.

#Intel Simics simulator CLI 

simics> bp.control_register.trace -all 
simics> bp.list 
ID   Description                                     Enabled    Oneshot
1    agilex.hps.core[0] break R/W of any register    true        false

simics> log-setup -time-stamp 

simics> r 100 
[bp.control_register trace] {agilex.hps.core[0] 0x7ff4403c 353987639} [trace:1] agilex.hps.core[0] read of cntpct_el0 
[bp.control_register trace] {agilex.hps.core[0] 0x7ff44030 353987644} [trace:1] agilex.hps.core[0] read of cntfrq_el0 
simics> bp.delete -all 

simics> bp.memory.trace address = 0xffe00000 length = 0x10 -r 

simics> bp.list 
ID   Description                                     Enabled    Oneshot
2    agilex.cell_context br..0xffe00000, len=16 ..)    true        false
simics> r 
[bp.memory trace] {agilex.hps.core[0] 0x7ffa52e8 1674062695} [trace:2] agilex.cell_context 'r' access to v:0xffe00000 len=4 
[bp.memory trace] {agilex.hps.core[0] 0x7ffa52e8 1674063170} [trace:2] agilex.cell_context 'r' access to v:0xffe00004 len=4 
[bp.memory trace] {agilex.hps.core[0] 0x7ffa52e8 1674063645} [trace:2] agilex.cell_context 'r' access to v:0xffe00008 len=4 
[bp.memory trace] {agilex.hps.core[0] 0x7ffa52e8 1674064100} [trace:2] agilex.cell_context 'r' access to v:0xffe0000c len=4

In the above example, the following actions are being executed:

  • A trace breakpoint is being configured to detect any change in any of the CPU control registers. The core can be selected using the psel command. In this case, the current CPU selected was core0. You can see that this breakpoint trace received the ID 1, and this can be seen in the list of breakpoints using the bp.list command.
  • The trace output are log messages and can be controlled with the log-setup command. For example, each message can be prepended with a time stamp, indicating the processor, program counter and the cycle count at the point where the event occurred.
  • The simulation is run for 100 steps. Here, you can see that some control registers have been accessed and some trace messages have been printed in the Intel® Simics® simulator CLI.
  • All the breakpoints are deleted as preparation of the setup of the next trace breakpoint.
  • A new trace breakpoint is being configured to report a message on any read access to address range 0xffe00000- 0xffe00010. This gets an ID = 2, which is observed using the bp.list command.
  • The simulation is run again, and the target software is commanded to do a memory read to address 0xffe0000. After this, the new trace messages are displayed in the Intel® Simics® simulator CLI.

Several other types of events can also be traced, such as target console string output and hits at specific source code lines. The trace over source code lines is described later in this document as this requires using a symbol file to provide information to the debugger about the source code.