Intel® Simics® Simulator for Intel® FPGAs: User Guide

ID 784383
Date 12/04/2023

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6.3.4. Hardware Access Breakpoints

Intel® Simics® simulator provides the capability to create breakpoints associated with the access of registers in a device. This can be useful to debug target software as you can identify whenever a register or set of registers is accessed. There are several Intel® Simics® simulator commands that you can use for this.


Description Enables breaking the simulation on register bank accesses. Runs the simulation until the specified register bank access occurs. Enables tracing of register bank accesses. When this is enabled, every time the specified register bank access occurs during simulation, a message is printed. Postpones execution of a script branch until the specified register bank access occurs.

These commands allow you to set a breakpoint in a read or write access to a full bank of registers or in single register defined by its name or by its offset. It also allows you to set a breakpoint in accessing a set of registers defined with an address range or when the register gets written to a specific value.

The following capture shows some examples that demonstrate the use of these commands. To exercise these scenarios, the target software must generate read/write accesses to the objects specified in the commands:
#Intel Simics simulator CLI 

# Exercise 1
simics> -r
Breakpoint 1: Will break on read access on
simics> r
running> devs
Count   Device                    Space                Range
    0   agilex.gpio0. ..   agilex.hps.phys_mem  0xffc03200-0xffc032ff
[] Breakpoint 1: read at 
offset=0xfc size=0x4 value=0x0 ini=agilex.hps.core[0]

Exercise 1 sets a breakpoint on a read access to any of the registers under the gpio0 device. This creates a breakpoint with the ID 1. The simulation is run and at this point, it is expected that the target software does a read access to a register under this bank (address 0xffc032fc used in this example). After doing the read access, you can observe that the simulation was stopped as a consequence of the breakpoint trigger.

#Intel Simics simulator CLI 

# Exercise 2
simics> devs
Count   Device                    Space                Range
    0   agilex.gpio0. ..   agilex.hps.phys_mem  0xffc03300-0xffc033ff

simics> print-device-regs agilex.gpio1
Bank: regs
Offset   Name                     Size     Value
  0x0   GPIO_SWPORTA_DR            4       0x0
  0x48  GPIO_DEBOUNCE              4       0x0

simics> register="GPIO_DE-BOUNCE"
simics> register="GPIO_DEBOUNCE" -w value=0xcafe
[ trace] [trace:4] read at offset=0x48 size=0x4 value=0xcafe ini=agilex.hps.core[0]
[ trace] [trace:4] write at offset=0x48 size=0x4 value=0xcafe ini=agilex.hps.core[0]
Exercise 2 sets two breakpoints over the GPIO_DEBOUNCE register in GPIO1 device (at offset 0xffc03348 in this example):
  • The first one is a trace to detect any read/write operation in the register, this gets an ID of 3.
  • The second breakpoint is set with the run-until command. This breakpoint is configured to trigger on a write operation to the same register with the value 0xcafe.
After this command, the simulation automatically runs in the background and the Intel® Simics® simulator waits for any of the events to occur.

In this example, a read operation to the register is done in the target software followed by the expected write operation. After this, you can see that a couple of messages are printed describing the read and write operations and also the simulation is stopped as a consequence of the last breakpoint.

The command used to set up the breakpoints presented in this section can be called directly over the objects used as argument. For this, the following commands can be used instead:

  1. <object>.regs.bp-break-bank
  2. <object>.regs.bp-run-until-bank
  3. <object>.regs.bp-trace-bank
  4. <object>.regs.bp-wait-for-bank