Parameterizable Macros for Intel FPGAs User Guide

ID 772350
Date 6/26/2023

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3.2. True Dual-Port RAM Parameterizable Macros

In True Dual-Port RAM mode, Port A and Port B are available with two address ports (one at Port A and one at Port B) and two data output ports (one at Port A and one at Port B). Both Port A and Port B can perform read and write operations according to the address provided from its address port. The same address is always referenced when read and write operations are happening at the same time at the same port.

Figure 3. True Dual-Port RAM Block Diagram