F-Tile Low Latency 50G Ethernet Intel® FPGA IP User Guide

ID 758946
Date 1/09/2024
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

5.1.1.2. Preamble Insertion

In the TX datapath the MAC prepends an eight-byte preamble to the client frame. If you turn on Enable link fault generation, this MAC module also incorporates the functions of the reconciliation sublayer (RS).

The source of the 7-byte preamble (including a Start byte) and 1-byte SFD depends on whether you turn on Enable preamble passthrough in the parameter editor.

If the preamble pass-through feature is enabled, the client provides the eight-byte preamble (including the 0xFB Start byte and final 1-byte SFD) on l1_tx_data. The client is responsible for providing the correct Start byte (0xFB) and an appropriate SFD byte. If the preamble pass-through feature is disabled, the MAC inserts the standard Ethernet preamble in the transmitted Ethernet frame.

Note that a single parameter in the F-Tile Low Latency 50G Ethernet Intel® FPGA IP parameter editor turns on both RX and TX preamble passthrough.