OPAE Intel FPGA Linux Device Driver Architecture Guide

ID 683857
Date 10/02/2017
Public
Document Table of Contents

1.1.12. Port IOCTLs

IOCTLs that are called on an open file descriptor for /dev/intel-fpga-port.k

FPGA_GET_API_VERSION—return the current version as an integer, starting from 0.

FPGA_CHECK_EXTENSION—not currently supported.

FPGA_PORT_GET_INFO—arg is a pointer to a:

struct fpga_port_info { 
	__u32 argsz; // in: sizeof(struct fpga_port_info) 
	__u32 flags; // out: returns 0 
	__u32 num_regions; // out: number of MMIO regions, 2 (1 for AFU and 1 for STP) 
	__u32 num_umsgs; // out: number of UMsg's supported by the hardware 
};
FPGA_PORT_GET_REGION_INFO—arg is a pointer to a:

struct fpga_port_region_info { 
	__u32 argsz; // in: sizeof(struct fpga_port_region_info) 
	__u32 flags; // out: (bitmask) { FPGA_REGION_READ, FPGA_REGION_WRITE, FPGA_REGION_MMAP }
	__u32 index; // in: FPGA_PORT_INDEX_UAFU or FPGA_PORT_INDEX_STP 
	__u32 padding; // in: must be 0 
	__u64 size; // out: size of MMIO region in bytes 
	__u64 offset; // out: offset of MMIO region from start of device fd 
};
FPGA_PORT_DMA_MAP—arg is a pointer to a:

struct fpga_port_dma_map { 
	__u32 argsz; // in: sizeof(struct fpga_port_dma_map) 
	__u32 flags; // in: must be 0 __u64 user_addr; // in: process virtual address. Must be page aligned. 
	__u64 length; // in: length of mapping in bytes. Must be a multiple of page size. 
	__u64 iova; // out: IO virtual address };
FPGA_PORT_DMA_UNMAP—arg is a pointer to a:

struct fpga_port_dma_unmap { 
	__u32 argsz; // in: sizeof(struct fpga_port_dma_unmap) 
	__u32 flags; // in: must be 0 
	__u64 iova; // in: IO virtual address returned by a previous FPGA_PORT_DMA_MAP };

FPGA_PORT_RESET—arg must be NULL.

FPGA_PORT_UMSG_ENABLE—arg must be NULL.

FPGA_PORT_UMSG_DISABLE—args must be NULL.

FPGA_PORT_UMSG_SET_MODE—arg is a pointer to a:

struct fpga_port_umsg_cfg { 
	__u32 argsz; // in: sizeof(struct fpga_port_umsg_cfg) 
	__u32 flags; // in: must be 0 
	__u32 hint_bitmap; // in: UMsg hint mode bitmap. Signifies which UMsg's are enabled. 
};
FPGA_PORT_UMSG_SET_BASE_ADDR—
  • UMsg must be disabled prior to issuing this ioctl.
  • The iova field must be for a buffer large enough for all UMsg’s (num_umsgs * PAGE_SIZE).
    • The buffer is marked as “in use” by the driver’s buffer management.
    • If iova is NULL, any previous region is unmarked as “in use”.
  • arg is a pointer to a:
    
    struct fpga_port_umsg_base_addr { 
    	__u32 argsz; // in: sizeof(struct fpga_port_umsg_base_addr) 
    	__u32 flags; // in: must be 0 
    	__u64 iova; // in: IO virtual address from FPGA_PORT_DMA_MAP. };
Note: To clear the port errors, you have to write the exact bitmask of the current errors, for example: cat errors > clear
Note: UMsg is only supported through Acceleration Stack for Intel® Xeon® Processor with Integrated FPGA.