Hybrid Memory Cube Controller Design Example User Guide

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ID 683817
Date 5/02/2016
Public
Document Table of Contents
Document Table of Contents x
1. Hybrid Memory Cube Controller Design Example Quick Start Guide 2. Hybrid Memory Cube Controller Design Example Description A. Additional Information
1. Hybrid Memory Cube Controller Design Example Quick Start Guide x
1.1. Design Example Directory Structure 1.2. Design Example Components 1.3. Generating the Design Example 1.4. Understanding the Testbench 1.5. Simulating the Design Example Testbench 1.6. Setting Up the Board 1.7. Compiling and Testing the Design Example in Hardware
2. Hybrid Memory Cube Controller Design Example Description x
2.1. Design Example Description 2.2. Features 2.3. Hardware and Software Requirements 2.4. Functional Description 2.5. Interface Signals 2.6. Design Example Register Map
A. Additional Information x
A.1. HMC Controller Design Example User Guide Revision History A.2. How to Contact Intel A.3. Typographic Conventions
1. Hybrid Memory Cube Controller Design Example Quick Start Guide
2. Hybrid Memory Cube Controller Design Example Description
A. Additional Information

2.6. Design Example Register Map

Table 4.  HMC Controller IP Core Design Example Register Map
Offset Register
0x00 DESIGN_INFO and RESET
0x01 BOARD_LEDS
0x02 TEST_INITIALIZATION_STATUS
0x03 PORT_TEST_STATUS
Table 5.  DESIGN_INFO AND RESET RegistersWriting to these registers resets the design.
Bits Field Name Type Value on Reset Description
1:0 Port Count RO Varies Number of ports for the IP core instance.
7:2 Reserved RO 0x00
Table 6.  BOARD_LEDs RegisterThis register reflects the status of the board's LEDs.
Bits Field Name Type Value on Reset Description
0 Test Failed RO 0x00 Test failed.
1 Test Passed RO 0x00 Test passed.
2 HMCC Link Initialization Complete RO 0x00 HMC link initialization complete and ready for traffic.
3 Heartbeat RO 0x00 Toggles when the design is running.
7:4 Reserved RO 0x00
Table 7.  TEST_INITIALIZATION_STATUS Register
Bits Field Name Type Value on Reset Description
0 I2C Clock Generator Set RO 0x00 On-board clock generators configured.
1 ATX PLL and Transceiver Recalibration Complete RO 0x00 ATX PLL and transceivers re-calibrated to the input clock.
2 I2C HMC Configuration Complete RO 0x00 HMC device configuration over I2C complete.
3 HMC Link Initialization Complete RO 0x00 HMC link initialization complete and ready for traffic.
7:4 Reserved RO 0x00
Table 8.  PORT_STATUS Register
Bits Field Name Type Value on Reset Description
0 Port 0 Requests OK RO 0x00 Port 0 request generation complete.
1 Port 0 Responses OK RO 0x00 Port 0 response checking passed.
2 Port 1 Requests OK RO 0x00 Port 1 request generation complete.
3 Port 1 Responses OK RO 0x00 Port 1 response checking passed.
4 Port 2 Requests OK RO 0x00 Port 2 request generation complete.
5 Port 2 Responses OK RO 0x00 Port 2 response checking passed.
6 Port 3 Requests OK RO 0x00 Port 3 request generation complete.
7 Port 4 Responses OK RO 0x00 Port 3 response checking passed.
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