Hybrid Memory Cube Controller Design Example User Guide

ID 683817
Date 5/02/2016
Public

1.5. Simulating the Design Example Testbench

Figure 6. Procedure

Follow these steps to simulate the testbench:

  1. At the command line, change to the <design example>/sim directory.
  2. Type make scripts.
  3. Type one of the following commands, depending on your simulator:

    Simulator License Command Line
    Mentor Graphics QuestaSim make vsim HMC_MODEL=< HMC BFM directory >
    Synopsys VCS make vcs HMC_MODEL=< HMC BFM directory >
    Cadence NCSIM make ncsim HMC_MODEL=< HMC BFM directory >

  4. To view simulation results:
    • When you run the testbench in any of the three supported simulators, the script executes the testbench sequence and logs the simulator activity in <design example directory> /example_design/sim/ <simulator> .log. <simulator> is "vsim", "ncsim", or "vcs".
    • When you run the testbench in any of the three supported simulators, the script generates a waveform file. You can run the command make <simulator> _gui to load the waveform in the simulator-specific waveform viewer.
    To view the waveform file in your simulator, type one of the following commands:

    Simulator License Command Line Waveform File
    Mentor Graphics ModelSim make vsim_gui <design example directory> /example_design/sim/mentor/hmcc_wf.wlf
    Synopsys Discovery Visual Environment make vcs_gui <design example directory> /example_design/sim/hmcc_wf.vpd
    Cadence SimVision Waveform make ncsim_gui <design example directory> /example_design/sim/cadence/hmcc_wf.shm

  5. Analyze the results. The successful testbench sends and receives ten packets per port, and displays Test_PASSED"

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