HDMI Intel® FPGA IP User Guide

ID 683798
Date 4/10/2023
Public

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5.1.18. Pixel Repetition

The pixel repetition block replicates pixels to accommodate low video resolutions (refer to section 6.4 of the HDMI 1.4 specification).

Pixels are repeated according to PR0-3 bits in AVI_PACKET_DATA1 register (refer to section 9.1.17 User_PACKET_DATA1 (0x015)). The AXI2CV VIDEO_MODE_SAMPLE_COUNT register must also be set to correspond to the total number of pixels after repetition. For example, for a 720x480i60 resolution with a repetition of 1, the VIDEO_MODE_SAMPLE_COUNT register must be set to 1440. The full range of pixel repetition specified in HDMI 1.4 is supported, from 0 to 9.