AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile

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ID 683757
Date 8/16/2018
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Document Table of Contents
Document Table of Contents x
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile x
Setup Requirements Debug Flow with Signal Probe and Rapid Recompile Example of Using Signal Probe Routing Feature Document Revision History for AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile
Debug Flow with Signal Probe and Rapid Recompile x
Reserve Signal Probe Pins Compile the Design Tcl Command to Compile the Design Assign Nodes to Signal Probe Pins Recompile the Design Check Connection Table in Fitter Report
Example of Using Signal Probe Routing Feature x
Example Files
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile

Compile the Design

Perform a full compilation of the design. You can use Intel® Quartus® Prime software, a command line executable, or a Tcl command.

Tcl Command to Compile the Design

execute_flow -compile

At this point in the design flow you determine the nodes you want to debug.

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