AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile

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ID 683757
Date 8/16/2018
Public
Document Table of Contents
Document Table of Contents x
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile x
Setup Requirements Debug Flow with Signal Probe and Rapid Recompile Example of Using Signal Probe Routing Feature Document Revision History for AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile
Debug Flow with Signal Probe and Rapid Recompile x
Reserve Signal Probe Pins Compile the Design Assign Nodes to Signal Probe Pins Recompile the Design Check Connection Table in Fitter Report
Example of Using Signal Probe Routing Feature x
Example Files
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile

Example of Using Signal Probe Routing Feature

Use this example to test the Signal Probe flow in a simple design. You can then modify this example to debug your own projects.

  1. Copy and paste top.tcl and top.v to the working directory.
  2. In the Intel® Quartus® Prime software, click Tools > Tcl Scripts....
  3. Select top.tcl, and click Run.
  4. When the script finishes, verify the connection success in the Connections to Signal Probe Pins report.

Alternatively, run the example from the command line:

quartus_sh -t top.tcl

The Tcl script executes with no errors. The Connections to Signal Probe Pins table appears on the Fitter report file, top.fit.rpt.

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