1.1. JESD204B IP v20.3.1
1.2. JESD204B Intel FPGA IP v20.2.1
1.3. JESD204B Intel FPGA IP v19.2.0
1.4. JESD204B Intel FPGA IP v19.2.0
1.5. JESD204B Intel FPGA IP v19.1
1.6. JESD204B Intel FPGA IP v18.1
1.7. JESD204B Intel FPGA IP v18.0
1.8. JESD204B IP Core v17.1
1.9. JESD204B IP Core v17.0
1.10. JESD204B IP Core v16.1
1.11. JESD204B IP Core v16.0
1.12. JESD204B IP Core v15.1
1.13. JESD204B IP Core v15.0
1.14. JESD204B IP Core v14.1
1.15. JESD204B Intel® FPGA IP User Guide Archives
1.16. JESD204B Stratix® 10 FPGA IP Design Example User Guide Archives
1.3. JESD204B Intel FPGA IP v19.2.0
| Quartus® Prime Version | Description | Impact |
|---|---|---|
| 19.4 | Updated the supported maximum data rate to 19.2 Gbps for Agilex™ 7 devices. | – |
| Enabled hardware design example for Agilex™ 7 devices. | You can generate the design example using the Agilex™ 7 Signal Integrity development kit. |