AN 908: Enabling 4G Wireless Acceleration in FlexRAN: for the Intel® FPGA Programmable Acceleration Card N3000

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ID 683736
Date 1/30/2020
Public
Document Table of Contents
Document Table of Contents x
1. About the 4G Wireless Acceleration Reference Design 2. 4G User Image Description 3. Document Revision History for AN 908: Enabling 4G Wireless Acceleration in FlexRAN for the Intel® FPGA Programmable Acceleration Card N3000
1. About the 4G Wireless Acceleration Reference Design x
1.1. 4G User Image Features 1.2. About the Intel PAC N3000
1.2. About the Intel PAC N3000 x
1.2.1. Factory Image for 2x2x25 GbE
2. 4G User Image Description x
2.1. User Image Power Management 2.2. 4G Channel Coder 2.3. Fronthaul IO 2.4. User Image Software
2.2. 4G Channel Coder x
2.2.1. 4G Channel Coder Throughput 2.2.2. 4G Turbo-V Encoder and Decoder Tests 2.2.3. 4G VRAN Universal Verification Methodology
2.3. Fronthaul IO x
2.3.1. O-RAN Compression and Decompression
1. About the 4G Wireless Acceleration Reference Design
2. 4G User Image Description
3. Document Revision History for AN 908: Enabling 4G Wireless Acceleration in FlexRAN for the Intel® FPGA Programmable Acceleration Card N3000

1. About the 4G Wireless Acceleration Reference Design

The 4G Wireless Acceleration reference design provides additional IP (Intel FPGA IP and software drivers) to support fronthaul IO and 4G channel coding (forward error correction (FEC)).

The Intel FPGA PAC N3000 provides an on-board PCIe switch that connects fronthaul and 4G channel coding functions to a PCIe Gen3x16 edge connector. The Intel FPGA PAC N3000 is a general-purpose acceleration card for networking.

Figure 1. Data flow for the user image, FEC, and Fronthaul IO

Section Content
4G User Image Features
About the Intel PAC N3000

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