Stratix® 10 TX Device Overview

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ID 683717
Date 9/07/2023
Public
Document Table of Contents
Document Table of Contents x
1. Intel® Stratix® 10 TX Device Overview
1. Intel® Stratix® 10 TX Device Overview x
1.1. Intel® Stratix® 10 TX Devices 1.2. Innovations in Intel® Stratix® 10 TX Devices 1.3. Intel® Stratix® 10 TX Features Summary 1.4. Intel® Stratix® 10 TX Block Diagram 1.5. Intel® Stratix® 10 TX Family Plan 1.6. Intel® Hyperflex™ Core Architecture 1.7. Heterogeneous 3D SiP Transceiver Tiles 1.8. Intel® Stratix® 10 TX Transceivers 1.9. PCI Express Gen1/Gen2/Gen3 Hard IP 1.10. Ethernet MAC, Reed-Solomon FEC for NRZ signals (528, 514) and PAM4 signals (544, 514) 1.11. 10G Ethernet Hard IP 1.12. Interlaken PCS Hard IP 1.13. External Memory and General Purpose I/O 1.14. Adaptive Logic Module (ALM) 1.15. Core Clocking 1.16. Fractional Synthesis PLLs and I/O PLLs 1.17. Internal Embedded Memory 1.18. Variable Precision DSP Block 1.19. Hard Processor System (HPS) 1.20. Power Management 1.21. Device Configuration and Secure Device Manager (SDM) 1.22. Device Security 1.23. Configuration via Protocol Using PCI Express* 1.24. Partial and Dynamic Reconfiguration 1.25. Fast Forward Compile 1.26. Single Event Upset (SEU) Error Detection and Correction 1.27. Document Revision History for the Intel® Stratix® 10 TX Device Overview
1.1. Intel® Stratix® 10 TX Devices x
1.1.1. Available Options
1.8. Intel® Stratix® 10 TX Transceivers x
1.8.1. PMA Features 1.8.2. PCS Features
1.19. Hard Processor System (HPS) x
1.19.1. Key Features of the Intel® Stratix® 10 HPS
1. Intel® Stratix® 10 TX Device Overview

1.22. Device Security

Building on top of the robust security features present in the previous generation devices, Intel® Stratix® 10 TX devices include a number of new and innovative security enhancements. These features are also managed by the SDM, tightly coupling device configuration and reconfiguration with encryption, authentication, key storage and anti-tamper services.

Security services provided by the SDM include:

  • Bitstream encryption
  • Multi-factor authentication
  • Hard encryption and authentication acceleration; AES-256, SHA-256/384, ECDSA-256/384
  • Volatile and non-volatile encryption key storage and management
  • Boot code authentication for the HPS
  • Physically Unclonable Function (PUF) service
  • Updateable configuration process
  • Secure device maintenance and upgrade functions
  • Side channel attack protection
  • Scripted response to sensor inputs and security attacks, including selective sector zeroization
  • Readback, JTAG and test mode disable
  • Enhanced response to single-event upsets (SEU)
  • Black key provisioning
  • Physical anti-tamper

See the Intel® Stratix® 10 Device Security User Guide for a complete list of all security features.

The SDM and associated security services provide a robust, multi-layered security solution for your Intel® Stratix® 10 TX design.

Table 14.  Device Security
Intel® Stratix® 10 Family Variant Bitstream Authentication Advanced Security Features 8
TX All devices -AS suffix part number required
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