Intel® FPGA Programmable Acceleration Card N3000 Board Management Controller User Guide

ID 683709
Date 11/25/2019

1.5. Power Sequence Management

The BMC Power sequencer state machine manages Intel® FPGA PAC N3000 power-on and power-off sequences for corner cases during the power-on process or normal operation. The Intel® MAX® 10 power-up flow covers the entire process including Intel® MAX® 10 boot-up, Nios® boot-up, and power sequence management for FPGA configuration. The host must check the build versions of both the Intel® MAX® 10 and FPGA, as well as the Nios® status after every power-cycle, and take corresponding actions in case the Intel® FPGA PAC N3000 runs into corner cases such as a Intel® MAX® 10 or FPGA factory build load failure or Nios® boot up failure. The BMC protects the Intel® FPGA PAC N3000 by shutting down power to the card under the following conditions:
  • 12 V Auxiliary or PCIe edge supply voltage is below 10.46 V
  • FPGA core temperature reaches 100°C
  • Board temperature reaches 85 °C

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