Intel® FPGA Programmable Acceleration Card N3000 Board Management Controller User Guide

ID 683709
Date 11/25/2019
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2. Board Monitoring through PLDM over MCTP SMBus

The BMC on the Intel® FPGA PAC N3000 communicates with a server BMC over the PCIe* SMBus.

The MCTP controller supports Platform Level Data Model (PLDM) over Management Component Transport Protocol (MCTP) stack. MCTP endpoint slave address is 0xCE by default. It can be reprogrammed into corresponding section of external FPGA Quad SPI flash via in-band way if necessary.

The Intel® FPGA PAC N3000 BMC supports a subset of the PLDM and MCTP commands to enable a server BMC to obtain sensor data such as voltage, current and temperature.

Note: Platform Level Data Model (PLDM) over MCTP SMBus endpoint is supported. PLDM over MCTP via native PCIe is not supported.

SMBus device category: "Fixed not Discoverable" device is supported by default,but all four device categories are supported and are field-reconfigurable.

ACK-Poll is supported
  • Supported with SMBus default slave address 0xCE.
  • Supported with a fixed or assigned slave address.

The BMC supports version 1.3.0 of the Management Component Transport Protocol (MCTP) Base Specification (DTMF specification DSP0236), version 1.1.1 of the PLDM for Platform Monitoring and Control standard (DTMF specification DSP0248), and version 1.0.0 of the PLDM for Message Control and Discovery (DTMF specification DSP0240).