eCPRI Intel® FPGA IP User Guide

ID 683685
Date 2/22/2024
Document Table of Contents

4.3.7. Packet Queue

This block is responsible to stage user incoming Ethernet frames (e.g., Control and Management packets, synchronization packets & etc) and arbitrate with eCPRI packets. These user Ethernet frames share the same Ethernet link with eCPRI packets. eCPRI IP does not encapsulate Ethernet header to these frames.