L-Tile and H-Tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* User Guide

ID 683667
Date 9/13/2024
Public
Document Table of Contents

10.5. BFM Procedures and Functions

The BFM includes procedures, functions, and tasks to drive Endpoint application testing.

The BFM read and write procedures read and write data to BFM shared memory, Endpoint BARs, and specified configuration registers. The procedures and functions are available in the Verilog HDL. These procedures and functions support issuing memory and configuration transactions on the PCI Express link.