Intel Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

Download PDF
ID 683633
Date 12/04/2020
Public
Document Table of Contents
Document Table of Contents x
1. About This Document 2. Introduction 3. Getting Started 4. Installing the OPAE Software Package 5. Identifying the Flash Image and BMC Firmware 6. Running FPGA Diagnostics 7. Running the OPAE in a Non-Virtualized Environment 8. Running the OPAE in a Virtualized Environment 9. Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Archives 10. Document Revision History for Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA A. Updating the FIM and BMC Firmware B. Handling Graceful Thermal Shutdown C. FPGA Device Access Permission D. Memlock Limit E. Hugepage Settings F. Troubleshooting Frequently Asked Questions (FAQ) G. Documentation Available for the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 Release
1. About This Document x
1.1. Intended Audience 1.2. Acronym List 1.3. Acceleration Glossary
3. Getting Started x
3.1. Intel Acceleration Stack Hardware Features 3.2. System Requirements 3.3. Installing the Intel® PAC with Intel® Arria® 10 GX FPGA Card In the Host Machine 3.4. Installing the Intel Acceleration Stack
3.4. Installing the Intel Acceleration Stack x
3.4.1. Installing the Intel Acceleration Stack Runtime Package on the Host Machine 3.4.2. Installing the Intel Acceleration Stack Development Package on the Host Machine 3.4.3. Understanding the Extracted Intel® PAC with Intel® Arria® 10 GX FPGA Release Package
4. Installing the OPAE Software Package x
4.1. RHEL 7.6: Installing the OPAE Framework from Prebuilt Binaries (RPM) 4.2. Ubuntu: Installing the OPAE Framework from Prebuilt Binaries (deb) 4.3. (Optional) Building and Installing the OPAE Software from Source Code 4.4. Installing the OPAE PACSign
7. Running the OPAE in a Non-Virtualized Environment x
7.1. Loading an AFU Image into the FPGA 7.2. OPAE Sample Application Programs
7.2. OPAE Sample Application Programs x
7.2.1. Running the Hello FPGA Example
8. Running the OPAE in a Virtualized Environment x
8.1. Updating Settings Required for VFs 8.2. Configuring the VF Port on the Host 8.3. Running the Hello FPGA Example on Virtual Machine
8.3. Running the Hello FPGA Example on Virtual Machine x
8.3.1. Disconnecting the VF from the VM and Reconnecting to the PF
A. Updating the FIM and BMC Firmware x
A.1. Selecting the Correct Update Method
A.1. Selecting the Correct Update Method x
A.1.1. Updating FPGA Flash and BMC Firmware
F. Troubleshooting Frequently Asked Questions (FAQ) x
F.1. Why do I see a 'No Suitable slots found' message when running fpgaconf on my AFU image? F.2. How do I flash the FIM or program the AFU in a multicard system? F.3. Which environment variables are required? F.4. What actions do I take if I see the error message 'Error enumerating resources: no driver available'? F.5. Troubleshooting OPAE Installation on RHEL
1. About This Document
2. Introduction
3. Getting Started
4. Installing the OPAE Software Package
5. Identifying the Flash Image and BMC Firmware
6. Running FPGA Diagnostics
7. Running the OPAE in a Non-Virtualized Environment
8. Running the OPAE in a Virtualized Environment
9. Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Archives
10. Document Revision History for Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
A. Updating the FIM and BMC Firmware
B. Handling Graceful Thermal Shutdown
C. FPGA Device Access Permission
D. Memlock Limit
E. Hugepage Settings
F. Troubleshooting Frequently Asked Questions (FAQ)
G. Documentation Available for the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 Release

3.4. Installing the Intel Acceleration Stack

You have the option of downloading the Acceleration Stack for Runtime or the Acceleration Stack for Development. If you are a software developer who develops and integrates your host application with accelerator functions, download the Acceleration Stack for Runtime. If you are an accelerator function developer who creates, debugs and simulates accelerator functions, download the Acceleration Stack for Development. Security functionality is equal across both.

The following table describes each Acceleration Stack package.
Table 3.   Intel® Acceleration Stack Download Options
Components Intel® Acceleration Stack for Runtime Intel® Acceleration Stack for Development
Purpose Software development of runtime host application Develop the hardware Accelerator function using RTL or OpenCL BSP with Intel® Quartus® Prime Pro Edition and Acceleration Stack.
Intel® Acceleration Stack Version Intel® Acceleration Stack Version 1.2.1 Intel® Acceleration Stack Version 1.2.1
OPAE Software Development Kit (SDK) version for 1.1.2

OPAE SDK version 1.1.2-2

OPAE SDK version 1.1.2-2

Intel® Quartus® Prime Pro Edition Software Not included or required Intel® Quartus® Prime Pro Edition software version 19.2.0 including SR-IOV license
OpenCL* Software Intel® FPGA Runtime Environment for OpenCL* 19.4.0.67 Intel® FPGA SDK for OpenCL* 19.4.0.67
Download Size 328 MB ~9.25 GB
Intel® Acceleration Stack download You can access the download (a10_gx_pac_ias_1_2_1_pv_rte_installer.tar.gz) by clicking here: Acceleration Stack for Runtime (RTE). You can access the download (a10_gx_pac_ias_1_2_1_pv_dev_installer.tar.gz) by clicking here: Acceleration Stack for Development (DEV).
Board Management Controller (BMC) version Firmware version 26895 Firmware version 26895

For more information about where to find the Acceleration Stack package, contact your Intel® support representative .


Section Content
Installing the Intel Acceleration Stack Runtime Package on the Host Machine
Installing the Intel Acceleration Stack Development Package on the Host Machine
Understanding the Extracted Intel PAC with Intel Arria 10 GX FPGA Release Package

Level Two Title