Nios® V Processor Reference Manual

ID 683632
Date 11/15/2021
Public

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Document Table of Contents

2.3.5.1. Timer and Software Interrupt Module

The timer and software interrupt host the following registers:
  • Machine Time (mtime) and Machine Time Compare (mtimecmp) registers for timer interrupt.
  • Machine Software Interrupt-pending (msip) field for software interrupt.

The value of mtime increments after every clock cycle. When the value of mtime is greater or equal to the value of mtimecmp, the timer post the interrupt.