AN 717: Nios II Gen2 Hardware Development Tutorial

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ID 683615
Date 9/22/2014
Public
Document Table of Contents
Document Table of Contents x
1. Hardware Development Tutorial
1. Hardware Development Tutorial x
1.1. Software and Hardware Requirements 1.2. 1.3. Design Example 1.4. System Development Flow 1.5. Creating the Design Example 1.6. Document Revision History
1.4. System Development Flow x
1.4.1. Analyzing System Requirements 1.4.2. Defining and Generating the System in 1.4.3. Integrating the System into the Project 1.4.4. Developing Software with the Software Build Tools for Eclipse 1.4.5. Running and Debugging Software on the Target Board 1.4.6. Varying the Development Flow
1.5. Creating the Design Example x
1.5.1. Install the Design Files 1.5.2. Analyze System Requirements 1.5.3. Start the Software and Open the Example Project 1.5.4. Create a New System 1.5.5. Define the System in 1.5.6. Integrate the System into the Project 1.5.7. Download the Hardware Design to the Target FPGA 1.5.8. Develop Software Using the SBT for Eclipse 1.5.9. Run the Program on Target Hardware
1.5.5. Define the System in x
1.5.5.1. Specify Target FPGA and Clock Settings 1.5.5.2. Add the On-Chip Memory 1.5.5.3. Add the Processor Core 1.5.5.4. Add the JTAG UART 1.5.5.5. Add the Interval Timer 1.5.5.6. Add the System ID Peripheral 1.5.5.7. Add the PIO 1.5.5.8. Specify Base Addresses and Interrupt Request Priorities 1.5.5.9. Generate the System
1.5.6. Integrate the System into the Project x
1.5.6.1. Instantiate the System Module in the Project 1.5.6.2. Add IP Variation File 1.5.6.3. Assign FPGA Device 1.5.6.4. Assign FPGA Pin Locations 1.5.6.5. Set Timing 1.5.6.6. Compile the Project and Verify Timing
1.5.8. Develop Software Using the SBT for Eclipse x
1.5.8.1. Create a New Application and BSP from Template 1.5.8.2. Compile the Project
1. Hardware Development Tutorial

1.4.4. Developing Software with the Nios II Software Build Tools for Eclipse

You can perform all software development tasks for your Nios II processor system using the Nios II Software Build Tools (SBT) for Eclipse™.

After you generate the system with Qsys, you can begin designing your C/C++ application code immediately with the Nios II SBT for Eclipse. Altera provides component drivers and a hardware abstraction layer (HAL) which allows you to write Nios II programs quickly and independently of the low-level hardware details. In addition to your application code, you can design and reuse custom libraries in your Nios II SBT for Eclipse projects.

To create a new Nios II C/C++ application project, the Nios II SBT for Eclipse uses information from the .sopcinfo file. You also need the .sof file to configure the FPGA before running and debugging the application project on target hardware.

The Nios II SBT for Eclipse can produce several outputs, listed below. Not all projects require all of these outputs.

Table 2.  Nios II SBT for Eclipse OutputsThe Nios II SBT for Eclipse can produce several outputs but not all projects require all of these outputs.
Output Description
system.h file
  • Defines symbols for referencing the hardware in the system.
  • The Nios II SBT for Eclipse automatically create this file when you create a new board support package (BSP).
Executable and Linking Format File (.elf) Is the result of compiling a C/C++ application project, that you can download directly to the Nios II processor.
Hexadecimal (Intel-Format) File (.hex)
  • Contains initialization information for on-chip memories.
  • The Nios II SBT for Eclipse generate these initialization files for on-chip memories that support initialization of contents.
Flash memory programming data
  • Boot code and other arbitrary data you might write to flash memory.
  • The flash programmer adds appropriate boot code to allow your program to boot from flash memory.
  • The Nios II SBT for Eclipse includes a flash programmer to allow you to write your program or arbitrary data to flash memory.

This tutorial focuses on downloading only the .elf directly to the Nios II system.

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