Intel® Agilex™ Hard Processor System Component Reference Manual

ID 683581
Date 12/14/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents Clock Sources

The drop-downs in this section control multiplexers in the HPS clock manager to select the source for the corresponding PLL or clock. Some of the drop-downs are enabled only when the corresponding peripherals are enabled. The FPGA to HPS Free clock is available as an option in these drop-downs when it is enabled on the Input Clocks tab.
Note: If you intend to use the FPGA to HPS free clock as the input to the hps_osc_clk pin, you must select that option for the Main PLL reference clock source and Peripheral PLL reference clock source.

You also have the option to override selected clock sources, by enabling the Override selected clock sources option.