AN 721: Creating an FPGA Power Tree

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ID 683564
Date 6/30/2019
Public
Document Table of Contents
Document Table of Contents x
Creating an FPGA Power Tree
Creating an FPGA Power Tree x
Obtaining Power Requirements with the Early Power Estimator Power Tree Input Supply Voltage Power Rails Power Rail Inputs Power Converters Early Power Estimator Document Revision History for AN 721: Creating an FPGA Power Tree
Creating an FPGA Power Tree

Creating an FPGA Power Tree

An FPGA power tree is a graphical representation of your system’s power management architecture. The power tree shows the main supply power flow through a tree of power converters that convert the main supply power to the voltage and current required to drive various loads. Every FPGA design has unique power consumption requirements requiring a unique power tree. This topic describes optimizing an FPGA power tree for your FPGA design.

FPGAs have several inputs requiring power for the FPGA to operate. These inputs produce power to various resource blocks within the FPGA, including logic, RAM, digital signal processing (DSP), phase-locked loops (PLLs), clocks, I/Os, and transceivers. These resource blocks have static and dynamic power requirements that vary by your selected FPGA and utilization. Your selected FPGA does not have a fixed power requirement. The total power consumption, and your FPGA power tree, depends on your design. To create an FPGA tree:

  1. Obtain power requirements with the Early Power Estimator (EPE).
  2. Determine the power tree input supply voltage.
  3. Extract power rails.
  4. Group power rail inputs.
  5. Select power converters.
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