AN 829: PCI Express* Avalon® -MM DMA Reference Design

ID 683554
Date 6/11/2018

1.2.6. Programming the Intel® Cyclone® 10 GX FPGA Oscillator

The Intel® Cyclone® 10 GX Development Kit includes a programmable oscillator that you must set up before you can run the reference design for Intel® Cyclone® 10 GX devices. A ClockController GUI allows you to import the correct settings.
  1. Locate the Kit Collateral (zip) link in the Documentation area of the Intel® Cyclone® 10 GX FPGA Development Kit web page.
  2. Use this link to download
  3. Unzip to a working directory on computer number 2.
  4. To bring up the Clock Controller dialog box, type the following commands:
    % cd <install_dir>/cyclone-10-gx-collateral/examples/board_test_system/
    % ./
    Figure 6. Clock Controller GUI in Initial State
  5. In the Clock Controller GUI, click Import.
  6. Browse to the <install_dir>/cyclone-10-gx-collateral/examples/board_test_system/ directory and select U64-Registers.txt.
  7. To import the register settings, click Open.
    The message, Si5332 Register Map is imported successfully displays. You should see the clock settings shown below.
    Figure 7. Clock Settings for Intel® Cyclone® 10 GX FPGA Development Kit