3.6.2. Programming the Flash Memory of an FPGA
Preloading an OpenCL image into the flash memory is necessary for the proper functioning of many Custom Platforms. For example, most PCIe®-based boards require a valid OpenCL image in flash memory so that hardware on the board can use the image to configure the FPGA device when the host system powers up for the first time. If the FPGA is not configured with a valid OpenCL image, the system will fail to enumerate the PCIe endpoint, or the driver will not function.
Before running any designs, ensure that the flash memory of your board has a valid OpenCL image that is compatible with the current OpenCL software version. Consult your board vendor's documentation for board-specific requirements.
To load your hardware configuration file into the flash memory of your FPGA board, perform the following tasks:
- Install any drivers or utilities that your Custom Platform requires.
- Verify that you set the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the subfolder in your Custom Platform that contains the board_env.xml file. Open a shell and then type echo $AOCL_BOARD_PACKAGE_ROOT at the command prompt.
If the returned path does not point to the location of the board_env.xml file within your Custom Platform, follow the instructions in Setting the Intel® FPGA RTE for OpenCL™ Standard Edition User Environment Variables to modify the environment variable setting.
- Download a design example for your Custom Platform.
Remember: Download design examples from the OpenCL Design Examples page, and extract the example to a location to which you have write access. Ensure that the location name does not contain spaces.
- To load the hardware configuration file into the flash memory, invoke the aocl flash <device_name> <design_example_filename>.aocx command, where <device_name> refers to the acl number (e.g. acl0 to acl31) that corresponds to your FPGA device, and <design_example_filename>.aocx is the hardware configuration file you create from the <design_example_filename>.cl file in the example design package.
- Power down your device or computer and then power it up again.
Power cycling ensures that the FPGA configuration device retrieves the hardware configuration file from the flash memory and configures it into the FPGA.Warning: Some Custom Platforms require you to power cycle the entire host system after programming the flash memory. For example, PCIe-based Custom Platforms might require a host system restart to reenumerate the PCIe endpoint. Intel® recommends that you power cycle the complete host system after programming the flash memory.