Intel® FPGA RTE for OpenCL™ Standard Edition: Getting Started Guide

ID 683550
Date 9/24/2018
Public
Document Table of Contents

4.1.6.2. Configuring the SW3 Switches

Configure the SW3 dual in-line package (DIP) switches on the Cyclone® V SoC Development Kit for use with the Intel® FPGA SDK for OpenCL™. The switch bank is located next to the micro SD card slot.
Set the SW3 DIP switches to the following positions:
Switch Configuration
1 ON
2 OFF
3 ON
4 OFF
5 ON
6 ON
The figure below illustrates the physical configuration of the SW switches on the Cyclone V SoC Development Kit: