R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide

ID 683544
Date 6/20/2022
Public

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1.1.2. Credit Distribution

Based on the available FIFO depth, the available credit is distributed as shown below.

Table 4.  Credit Distribution for RX Credit Initialization
Credit Type Credit Initialization
Header Type Posted Non-Posted Completion
Header Credit 11 11 10
Data Credit 85 85 85
Note: Each 16 bytes of data consume one credit.

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