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18.104.22.168.1. Build and Install Netdev Driver 22.214.171.124.2. Enable VFs if SRIOV is Supported 126.96.36.199.3. Configure the Number of Channels Supported on the Device 188.8.131.52.4. Configure the MTU Value 184.108.40.206.5. Configure the Device Communication 220.127.116.11.6. Configure Transmit Queue Selection Mechanism 18.104.22.168.7. Test Procedure by Using Name Space Environment 22.214.171.124.8. PIO Test
126.96.36.199. Single-Port Avalon-ST PIO Using MCDMA Bypass Mode
This design example enables Avalon-MM PIO master which bypasses the DMA path. The Avalon-MM PIO master (rx_pio_master) allows your application to perform single, non-bursting register read/write operation with on-chip memory. This design example only supports PIO functionality and does not perform DMA operations. Hence, the Avalon-ST DMA ports are not connected.
Figure 1. MCDMA IP Single Port Avalon-ST Interface PIO Example Design using MCDMA Bypass Mode
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