AN 890: JESD204B Intel® FPGA IP and ADI AD9174 Interoperability Report for Intel Stratix® 10 L-Tile Devices

ID 683511
Date 5/28/2019
Public

1.3. Hardware Checkout Methodology

This section describes the test objectives, procedures, and passing criteria. The test covers the following areas:

  • Transmitter data link layer
  • Transmitter transport layer
  • Scrambling
  • Deterministic latency (subclass 1)

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