Generic Flash Programmer User Guide: Intel® Quartus® Prime Pro Edition

ID 683495
Date 3/28/2022
Public
Document Table of Contents

1.3.1.1. Step 1: Generate Primary Device Programming File

The Intel® Quartus® Prime Assembler generates the .sof FPGA configuration file once design compilation is complete. Prior to running the Assembler, you can specify device and pin options that impact the .sof and subsequent .jic file generation.

Follow these steps to generate a .sof for use in generic flash programming:

  1. Before running the Assembler, click Assignments > Device > Device & Pin Options to specify options for FPGA configuration pins and other hardware settings that the .sof preserves. The following options are particularly relevant to generic flash programming. For option descriptions, refer to Device and Pin Options.
    • General tab—specify JTAG user code and configuration clock source.
    • Configuration tab—specify Active Serial x4 and appropriate Configuration Pin Options for the FPGA. Select Auto for Configuration device voltage, which you specify with precision at a later time.
    • Security—specify settings to enable optional authentication and encryption of the configuration bitstream file.2
    Figure 4. Device & Pin Options Dialog Box ( Intel® Stratix® 10 Design)
  2. To generate primary device programming files, click Processing > Start > Start Assembler, or double-click Assembler on the Compilation Dashboard. The Compiler confirms that prerequisite modules are complete, and launches the Assembler to generate the programming files.
2 Security options not yet available for Intel® Agilex™ devices.

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