Generic Flash Programmer User Guide: Intel® Quartus® Prime Pro Edition
ID
683495
Date
3/28/2022
Public
1.1. Supported Devices and Configuration Methods
1.2. Quad SPI Flash Byte-Addressing
1.3. Generic Flash Programmer Operation
1.4. Generic Flash Programmer Flow Templates ( Intel® Stratix® 10 devices)
1.5. Generic Flash Programmer Flow Templates ( Intel® Arria® 10 and Intel® Cyclone® 10 GX)
1.6. Generic Flash Programmer Settings Reference
1.7. Generic Flash Programmer User Guide Revision History
1.8. Generic Flash Programmer Document Archive
1.4.1. Initialization Flow Template ( Intel® Stratix® 10 Devices)
1.4.2. Program Flow Template ( Intel® Stratix® 10 Devices)
1.4.3. Erase Flow Template ( Intel® Stratix® 10 Devices)
1.4.4. Verify/Blank-Check/Examine Flow Template ( Intel® Stratix® 10 Devices)
1.4.5. Termination Flow Template ( Intel® Stratix® 10 Devices)
1.5.1. Initialization Flow Templates ( Intel® Arria® 10 and Intel® Cyclone® 10 GX)
1.5.2. Program Flow Template ( Intel® Arria® 10 and Intel® Cyclone® 10 GX)
1.5.3. Erase Flow Template ( Intel® Arria® 10 and Intel® Cyclone® 10 GX)
1.5.4. Verify/Blank-Check/Examine Flow Template ( Intel® Arria® 10 and Intel® Cyclone® 10 GX)
1.5.5. Termination Flow Template ( Intel® Arria® 10 and Intel® Cyclone® 10 GX)
1.5.6. Programming Flow Action Properties
1.6.1. Device and Pin Options
1.6.2. More Security Options Dialog Box
1.6.3. Input Files Tab Settings (Programming File Generator)
1.6.4. Output Files Tab Settings (Programming File Generator)
1.6.5. Add Partition Dialog Box (Programming File Generator)
1.6.6. Bitstream Co-Signing Security Settings (Programming File Generator)
1.6.7. Convert Programming File Dialog Box
1.6.8. Compression and Encryption Settings (Convert Programming File)
1.6.9. SOF Data Properties Dialog Box (Convert Programming File)
1.6.10. Select Devices (Flash Loader) Dialog Box
1.3.1. Generic Flash Programming (Programming File Generator)
You can use the Programming File Generator to generate the necessary secondary programming files for flash programming with Intel® Agilex™ and Intel® Stratix® 10 devices.
The .jic secondary programming file allows you to perform JTAG programming via the FPGA Secure Device Manager (SDM) and Factory SDM helper image. The SDM controls secure access to the FPGA, and the Factory SDM helper image enables communication between the JTAG connection and the flash memory serial interface. After generating the files, you use the Intel® Quartus® Prime Programmer to program the flash, which in turn configures the FPGA via AS configuration.
Note: The Programming File Generator generates the .jic file for different byte addressing based on the FPGA and flash memory device. The flash device must power up to the compatible byte-addressing according to
Figure 3. Intel® Stratix® 10 Flash Programming Configuration
Generic Flash Programmer operation includes the following high level steps that this section describes in detail:
- Step 1: Generate Primary Device Programming File—use the Intel® Quartus® Prime Assembler to generate the .sof FPGA configuration file.
- Step 2: Generate Secondary Programming Files (Programming File Generator)—use the Programming File Generator to generate the .jic that you program into your flash memory device to store .sof configuration data.
- Step 3: Program the Flash Memory Device—use the Intel® Quartus® Prime Programmer and connected Intel FPGA download cable to program the .jic configuration data into the flash memory device and the .sof into the FPGA via Active Serial JTAG configuration.