AN-811: Using the Avery BFM for PCI Express Gen3x16 Simulation on Intel® Stratix® 10 Devices

ID 683477
Date 1/23/2018
Public

ModelSim

The ModelSim simulator uses a TCL script to simulate the design.

An example TCL script is included with the Avery simulation scripts (modelsim/msim_setup_avery.tcl). However, many file names are uniquely generated when you create the example design, so you must modify this TCL script to incorporate the correct file names.

  1. Open the modelsim/msim_setup_avery.tcl in a text editor.
  2. Open the auto-generated msim_setup.tcl file in a text editor. By default this file is located at <Example_Design_Directory>/pcie_example_design_tb/pcie_example_design_tb/sim/mentor
  3. Locate the alias com sections of both msim_setup_avery.tcl and msim_setup.tcl. These sections are responsible for compiling all necessary design files.
  4. Copy the alias com section of msim_setup.tcl and paste it into the alias com section of msim_setup_avery.tcl.
  5. Close msim_setup.tcl.
  6. Remove the following final four files from the alias com section of msim_setup_avery.tcl:
    • altpcie_s10_tbed_hwtcl.v
    • altpcied_s10_hwtcl.sv
    • DUT_pcie_tb_ip.v
    • pcie_example_design_tb.v
    These files all instantiate the Intel FPGA root complex BFM and will be replaced by Avery files.
  7. Save and close msim_setup_avery.tcl.
Note: Unlike with the VCS procedures, you do not need to replace any environment variables or add any new files to the list.

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