MAX 10 Embedded Multipliers User Guide

ID 683467
Date 2/21/2017
Public
Document Table of Contents

6.2. ALTMULT_ADD Ports

Table 18.  ALTMULT_ADD IP Core Input Ports
Port Name Required Description
dataa[] Yes Data input to the multiplier. Input port [NUMBER_OF_MULTIPLIERS * WIDTH_A - 1..0] wide.
datab[] Yes Data input to the multiplier. Input port [NUMBER_OF_MULTIPLIERS * WIDTH_B - 1..0] wide.
clock[] No Clock input port [0..3] to the corresponding register. This port can be used by any register in the IP core.
aclr[] No Input port [0..3]. Asynchronous clear input to the corresponding register.
ena[] No Input port [0..3]. Clock enable for the corresponding clock[] port.
signa No Specifies the numerical representation of the dataa[] port. If the signa port is high, the multiplier treats the dataa[] port as a signed two's complement number. If the signa port is low, the multiplier treats the dataa[] port as an unsigned number.
signb No Specifies the numerical representation of the datab[] port. If the signb port is high, the multiplier treats the datab[] port as a signed two's complement number. If the signb port is low, the multiplier treats the datab[] port as an unsigned number.
Table 19.  ALTMULT_ADD IP Core Output Ports
Port Name Required Description
result[] Yes Multiplier output port. Output port [WIDTH_RESULT - 1..0] wide.
overflow No Overflow flag. If output_saturation is enabled, overflow flag is set.
scanouta[] No Output of scan chain A. Output port [WIDTH_A - 1..0] wide.
scanoutb[] No Output of scan chain B. Output port [WIDTH_B - 1..0] wide.

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