Intel® Quartus® Prime Pro Edition User Guide: Getting Started

ID 683463
Date 12/04/2023

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Document Table of Contents Project Files to Include In External Revision Control

When archiving Intel® Quartus® Prime projects for external source control, The Source control setting in Advanced Archive Settings dialog box is preset to include all appropriate file types for source control automatically.

Figure 73. Advanced Archive Settings Dialog Box
Table 35.  Project Files to Include In External Revision Control
File Type Description
Intel® Quartus® Prime project setting and assignment files
  • Intel® Quartus® Prime Project Files (.qpf)
  • Intel® Quartus® Prime Settings Files (.qsf)
  • Intel® Quartus® Prime Pin Planner File (.ppf)
Timing constraint files Synopsys Design Constraint Files (.sdc)
Design files
  • Verilog HDL Design Files (.v)
  • SystemVerilog Design Files (.sv)
  • VHDL Design Files (.vhd)
  • Block Symbol Files (.bsf)
  • Verilog Quartus Mapping Files (.vqm)
  • Platform Designer System Files (.qsys)
  • State Machine Editor Files (.smf)
  • Tcl Script Design Files (.tcl)
System and IP files
  • IP variation file (.ip)
  • Verilog IP design files (.v)
  • SystemVerilog IP design files (.sv)
  • VHDL IP design files (.sv)
  • VHDL Component Declaration Files (.cmp)
  • Intel® Quartus® Prime IP file (.qip)
  • Intel® Quartus® Prime Simulation IP File (.sip)
  • Platform Designer System Files (.qsys)
  • Platform Designer connection and parameterization files (.sopcinfo)
  • IP upgrade status files (.csv)
  • IP synthesis parameters files (.qgsynthc)
  • IP simulation parameters files (.qgsimc)
  • Platform Designer system exported as (.tcl).
EDA tool integration files
  • Verilog HDL Output Files (.vo)
  • VHDL Output Files (.vho)
  • VHDL simulation model files (.vhd)
  • Verilog HDL simulation model files (.v)
  • Simulation library files (cds.lib, hdl.var)
  • Simulation setup scripts (, .tcl, .spd, .txt)