Intel® Quartus® Prime Pro Edition User Guide: Getting Started

ID 683463
Date 6/20/2022
Public
Document Table of Contents

4.12.1. Flat Compilation without Design Partitions

In a flat compilation flow without any design partitions, the Intel® Quartus® Prime software compiles the entire design in a “flat” netlist.

Although the source code may be hierarchical, the Compiler flattens and synthesizes all the design logic. Whenever you re-compile the project, the Compiler re-performs all available logic and placement optimizations on the entire design.

The flat compilation flow does not require any planning for design partitions. However, because the Intel® Quartus® Prime software recompiles the entire design whenever you change your design, flat design practices may require more overall compilation time for large designs. Additionally, you may find that the results for one part of the design change when you change a different part of your design. You can use block-based design to preserve portions of previous placement and routing in subsequent compilations. Block based design practices can reduce your total compilation time in a partitioned design if you make small changes to other portions of your design.

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