F-Tile Ethernet Intel® FPGA Hard IP Release Notes

ID 683443
Date 9/26/2022
Public

1.4. F-Tile Ethernet Intel® FPGA Hard IP v4.0.0

Table 4.  v4.0.0 2021.12.13
Intel® Quartus® Prime Version Description Impact
21.4 Added new parameter: Enable FHT pre-encoder. When enabled, allows the FHT precoding for PAM4 designs.
Added new parameter: Enable Native PHY Debug Endpoint. When enabled, allows you to access the Ethernet toolkit via internal JTAG interface. The Intel® Quartus® Prime software version 21.4 supports transceiver toolkit for a single transceiver channel.
Updated Intel® Quartus® Prime software Support-Logic Generation step. The Support-Logic Generation command runs automatically when you generate your design using F-Tile Ethernet Intel® FPGA Hard IP Example Design IP Parameter Editor.
Added support for Cadence* Xcelium* simulator.

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